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73 lines
2.9 KiB
C
73 lines
2.9 KiB
C
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/*
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* Copyright (c) 2022, Artinchip Technology Co., Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __AIC_ERRNO_H__
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#define __AIC_ERRNO_H__
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#define __LINUX_ERRNO_EXTENSIONS__
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#include <errno.h>
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#define EOK 0 /* Error State : OK */
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/* User define err no */
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#define ERRNO_DRV_START 0X80
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/* driver General error codes */
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typedef enum
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{
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DRV_ERROR = ERRNO_DRV_START, ///< Unspecified error
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DRV_ERROR_BUSY, ///< Driver is busy
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DRV_ERROR_TIMEOUT, ///< Timeout occurred
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DRV_ERROR_UNSUPPORTED, ///< Operation not supported
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DRV_ERROR_PARAMETER, ///< Parameter error
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DRV_ERROR_SPECIFIC ///< Start of driver specific errors
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} drv_err_e;
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/** driver module id definition*/
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#define AIC_DRV_ERRNO_BASE 0x81000000
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#define AIC_DRV_ERRNO_GPIO_BASE 0x81010000
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#define AIC_DRV_ERRNO_USART_BASE 0x81020000
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#define AIC_DRV_ERRNO_SPI_BASE 0x81030000
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#define AIC_DRV_ERRNO_IIC_BASE 0x81040000
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#define AIC_DRV_ERRNO_PWM_BASE 0x81050000
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#define AIC_DRV_ERRNO_RTC_BASE 0x81060000
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#define AIC_DRV_ERRNO_TIMER_BASE 0x81070000
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#define AIC_DRV_ERRNO_WDT_BASE 0x81080000
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#define AIC_DRV_ERRNO_AES_BASE 0x81090000
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#define AIC_DRV_ERRNO_CRC_BASE 0x810A0000
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#define AIC_DRV_ERRNO_RSA_BASE 0x810B0000
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#define AIC_DRV_ERRNO_SHA_BASE 0x810C0000
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#define AIC_DRV_ERRNO_TRNG_BASE 0x810D0000
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#define AIC_DRV_ERRNO_EFLASH_BASE 0x810E0000
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#define AIC_DRV_ERRNO_DMA_BASE 0x810F0000
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#define AIC_DRV_ERRNO_NORFLASH_BASE 0x81100000
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#define AIC_DRV_ERRNO_INTC_BASE 0x81110000
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#define AIC_DRV_ERRNO_SPU_BASE 0x81120000
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#define AIC_DRV_ERRNO_ADC_BASE 0x81130000
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#define AIC_DRV_ERRNO_PMU_BASE 0x81140000
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#define AIC_DRV_ERRNO_BMU_BASE 0x81150000
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#define AIC_DRV_ERRNO_ETB_BASE 0x81160000
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#define AIC_DRV_ERRNO_I2S_BASE 0x81170000
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#define AIC_DRV_ERRNO_USI_BASE 0x81180000
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#define AIC_DRV_ERRNO_SPIFLASH_BASE 0x81190000
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#define AIC_DRV_ERRNO_ACMP_BASE 0x811A0000
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#define AIC_DRV_ERRNO_MAILBOX_BASE 0x811B0000
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#define AIC_DRV_ERRNO_EFUSEC_BASE 0x811C0000
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#define AIC_DRV_ERRNO_CODEC_BASE 0x811D0000
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#define AIC_DRV_ERRNO_DPU_BASE 0x811E0000
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#define AIC_DRV_ERRNO_VPU_BASE 0x811F0000
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#define AIC_DRV_ERRNO_CAMERA_BASE 0x81200000
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#define AIC_DRV_ERRNO_MIPI_CSI_BASE 0x81210000
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#define AIC_DRV_ERRNO_MIPI_CSI_READER_BASE 0x81220000
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#define AIC_DRV_ERRNO_GMAC_BASE 0x81230000
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#define AIC_DRV_ERRNO_ETHPHY_BASE 0x81240000
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#define AIC_DRV_ERRNO_QW_EFUSE_BASE 0x81250000
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#define AIC_DRV_ERRNO_RESET_BASE 0x81260000
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#endif /* __AIC_ERRNO_H__ */
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