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https://gitee.com/Vancouver2017/luban-lite-t3e-pro.git
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72 lines
1.5 KiB
C
72 lines
1.5 KiB
C
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/*
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* Copyright (c) 2022, ArtInChip Technology Co., Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Authors: weilin.peng@artinchip.com
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*/
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#include <aic_core.h>
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#include <aic_hal.h>
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#include "board.h"
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struct aic_sysclk
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{
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unsigned long freq;
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unsigned int clk_id;
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};
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struct aic_sysclk aic_sysclk_config[] = {
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//{600000000, CLK_PLL_INT0},
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{1200000000, CLK_PLL_INT1},
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{491520000, CLK_PLL_FRA1},
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{840000000, CLK_PLL_FRA2},
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{240000000, CLK_AXI0},
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{240000000, CLK_AHB0},
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{100000000, CLK_APB0},
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{24000000, CLK_APB1},
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{600000000, CLK_CPU},
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{25000000, CLK_OUT2},
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#ifdef AIC_USING_UART0
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{48000000, CLK_UART0},
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#endif
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#ifdef AIC_USING_UART1
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{48000000, CLK_UART0+1},
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#endif
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#ifdef AIC_USING_UART2
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{48000000, CLK_UART0+2},
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#endif
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#ifdef AIC_USING_UART3
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{48000000, CLK_UART0+3},
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#endif
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#ifdef AIC_USING_UART4
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{48000000, CLK_UART0+4},
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#endif
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#ifdef AIC_USING_UART5
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{48000000, CLK_UART0+5},
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#endif
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#ifdef AIC_USING_UART6
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{48000000, CLK_UART0+6},
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#endif
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#ifdef AIC_USING_UART7
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{48000000, CLK_UART0+7},
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#endif
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};
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void aic_board_sysclk_init(void)
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{
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uint32_t i = 0;
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for (i=0; i<sizeof(aic_sysclk_config)/sizeof(struct aic_sysclk); i++) {
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hal_clk_set_freq(aic_sysclk_config[i].clk_id, aic_sysclk_config[i].freq);
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}
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/* Enable sys clk */
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hal_clk_enable_deassertrst_iter(CLK_GPIO);
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hal_clk_enable_deassertrst_iter(CLK_GTC);
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#ifdef AIC_USING_GMAC0
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hal_clk_enable_deassertrst_iter(CLK_OUT2);
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#endif
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}
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