2023-08-30 16:21:18 +08:00
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/*
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* Copyright (c) 2022-2023, ArtInChip Technology Co., Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Authors: Ning Fang <ning.fang@artinchip.com>
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*/
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#ifndef _GE_HW_H_
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#define _GE_HW_H_
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#include "aic_common.h"
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2023-11-09 20:19:51 +08:00
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#include "aic_log.h"
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2023-08-30 16:21:18 +08:00
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#include "aic_osal.h"
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#include "aic_io.h"
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#include "aic_hal_ge.h"
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u32 ge_get_version_id(unsigned long base_addr);
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/**
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*@ func_select
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* 0: nomal
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* 1: rotation1
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* 2: horizontal shear
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* 3: vertical shear
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*
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*@ rot0_ctrl
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* 0: 0 degree
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* 1: 90 degree
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* 2: 180 degree
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* 3: 270 degree
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*
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*@ source_mode
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* 0: buffer mode
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* 1: fill color
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* 2: horizontal gradient fill rect
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* 3: vertical gradient fill rect
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*/
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void ge_config_src_ctrl(unsigned long base_addr,
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u32 global_alpha, u32 alpha_mode,
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u32 premul_en, u32 scan_order,
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u32 func_select, u32 fmt, u32 v_flip,
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u32 h_flip, u32 rot0_ctrl,
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u32 source_mode, u32 csc0_en);
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/**
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*@ func_select
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* 0: nomal
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* 1: rotation1
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* 2: horizontal shear
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* 3: vertical shear
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*/
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void ge_config_src_simple(unsigned long base_addr,
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u32 global_alpha, u32 alpha_mode,
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u32 premul_en, u32 func_select,
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u32 fmt, u32 source_mode);
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void ge_config_output_ctrl(unsigned long base_addr,
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u32 premul, int fmt,
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u32 dither_en, u32 csc2_en);
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void ge_dst_enable(unsigned long base_addr, u32 global_alpha,
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u32 alpha_mode, int fmt, int csc1_en);
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void ge_dst_disable(unsigned long base_addr);
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/**
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*@ direction
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* 0: horizontal gradient
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* 1: vertical gradient
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*/
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void ge_config_fill_gradient(unsigned long base_addr,
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int width, int height,
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u32 start_color, u32 end_color,
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u32 direction);
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void ge_config_dither(unsigned long base_addr, u32 dither_addr);
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void ge_config_fillrect(unsigned long base_addr, u32 fill_color);
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void ge_config_rot1(unsigned long base_addr,
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int angle_sin, int angle_cos,
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int src_center_x, int src_center_y,
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int dst_center_x, int dst_center_y);
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void ge_config_shear(unsigned long base_addr,
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int offset_x, int offset_y,
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int angle_tan);
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void ge_config_color_key(unsigned long base_addr, u32 ck_value);
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/**
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*@ src_alpha_coef
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*@ dst_alpha_coef
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* 0: 0.0
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* 1: 1.0
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* 2: sa(src alpha)
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* 3: 1.0 - da
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* 4: da(dst alpha)
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* 5: 1.0 - da
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*/
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void ge_config_blend(unsigned long base_addr,
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u32 src_de_premul, u32 dst_de_premul,
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u32 alpha_ctrl, u32 src_alpha_coef,
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u32 dst_alpha_coef, u32 ck_en,
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u32 alpha_en);
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void ge_set_scaler0(unsigned long base_addr,
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u32 input_w, u32 input_h,
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u32 output_w, u32 output_h,
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int dx, int dy,
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int h_phase, int v_phase,
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u32 channel);
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void ge_scaler0_enable(unsigned long base_addr, u32 enable);
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/**
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*@ csc select
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* 0: csc0
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* 1: csc1
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*/
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void ge_set_csc_coefs(unsigned long base_addr, int color_space, u32 csc);
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void ge_write_csc0_coefs(unsigned long base_addr, u32 *coefs);
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/**
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* set csc2
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*/
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void ge_set_csc2_coefs(unsigned long base_addr, int color_space);
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void ge_set_src_info(unsigned long base_addr, u32 w, u32 h,
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u32 stride0, u32 stride1, u32 addr[]);
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void ge_set_dst_info(unsigned long base_addr, u32 w, u32 h,
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u32 stride0, u32 stride1, u32 addr[]);
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void ge_set_output_info(unsigned long base_addr, u32 w, u32 h,
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u32 stride0, u32 stride1, u32 addr[]);
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void ge_set_hw_timeout_cycle(unsigned long base_addr, u32 clk_num);
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u32 ge_read_hw_counter(unsigned long base_addr);
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u32 ge_read_soft_reset_cycle(unsigned long base_addr);
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u32 ge_read_status(unsigned long base_addr);
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void ge_clear_status(unsigned long base_addr, u32 status);
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void ge_enable_interrupt(unsigned long base_addr);
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void ge_disable_interrupt(unsigned long base_addr);
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void ge_start(unsigned long base_addr);
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#endif /*_GE_HW_H_ */
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