wen/luban-lite-t3e-pro
1
0
Fork 0
mirror of https://gitee.com/Vancouver2017/luban-lite-t3e-pro.git synced 2025-12-16 11:28:54 +00:00
Code Issues Packages Projects Releases Wiki Activity

V1.0.5

Browse Source
This commit is contained in:
刘可亮
2024-06-04 19:00:30 +08:00
parent 990c72f5be
commit 0a13af6a1d
1668 changed files with 342810 additions and 37726 deletions
Download Patch File Download Diff File Expand all files Collapse all files

262
bsp/artinchip/hal/display/aic_hal_dsi.c
View File

@@ -105,133 +105,133 @@ static void dsi_dphy_cfg_hsfreq(void *base, ulong mclk)
u32 freq_rdata = mclk / 1000000;
u32 freq_wdata;
switch (freq_rdata) {
case 80 ... 89:
freq_wdata = 0x00 << 1;
break;
case 90 ... 99:
freq_wdata = 0x10 << 1;
break;
case 100 ... 109:
freq_wdata = 0x20 << 1;
break;
case 110 ... 129:
freq_wdata = 0x01 << 1;
break;
case 130 ... 139:
freq_wdata = 0x11 << 1;
break;
case 140 ... 149:
freq_wdata = 0x21 << 1;
break;
case 150 ... 169:
freq_wdata = 0x02 << 1;
break;
case 170 ... 179:
freq_wdata = 0x12 << 1;
break;
case 180 ... 199:
freq_wdata = 0x22 << 1;
break;
case 200 ... 219:
freq_wdata = 0x03 << 1;
break;
case 220 ... 239:
freq_wdata = 0x13 << 1;
break;
case 240 ... 249:
freq_wdata = 0x23 << 1;
break;
case 250 ... 269:
freq_wdata = 0x04 << 1;
break;
case 270 ... 299:
freq_wdata = 0x14 << 1;
break;
case 300 ... 329:
freq_wdata = 0x05 << 1;
break;
case 330 ... 359:
freq_wdata = 0x15 << 1;
break;
case 360 ... 399:
freq_wdata = 0x25 << 1;
break;
case 400 ... 449:
freq_wdata = 0x06 << 1;
break;
case 450 ... 499:
freq_wdata = 0x16 << 1;
break;
case 500 ... 549:
freq_wdata = 0x07 << 1;
break;
case 550 ... 599:
freq_wdata = 0x17 << 1;
break;
case 600 ... 649:
freq_wdata = 0x08 << 1;
break;
case 650 ... 699:
freq_wdata = 0x18 << 1;
break;
case 700 ... 749:
freq_wdata = 0x09 << 1;
break;
case 750 ... 799:
freq_wdata = 0x19 << 1;
break;
case 800 ... 849:
freq_wdata = 0x29 << 1;
break;
case 850 ... 899:
freq_wdata = 0x39 << 1;
break;
case 900 ... 949:
freq_wdata = 0x0a << 1;
break;
case 950 ... 999:
freq_wdata = 0x1a << 1;
break;
case 1000 ... 1049:
freq_wdata = 0x2a << 1;
break;
case 1050 ... 1099:
freq_wdata = 0x3a << 1;
break;
case 1100 ... 1149:
freq_wdata = 0x0b << 1;
break;
case 1150 ... 1199:
freq_wdata = 0x1b << 1;
break;
case 1200 ... 1249:
freq_wdata = 0x2b << 1;
break;
case 1250 ... 1299:
freq_wdata = 0x3b << 1;
break;
case 1300 ... 1349:
freq_wdata = 0x0c << 1;
break;
case 1350 ... 1399:
freq_wdata = 0x1c << 1;
break;
case 1400 ... 1449:
freq_wdata = 0x2c << 1;
break;
case 1450 ... 1499:
freq_wdata = 0x3c << 1;
break;
default:
freq_wdata = 0x00;
break;
}
switch (freq_rdata) {
case 80 ... 89:
freq_wdata = 0x00 << 1;
break;
case 90 ... 99:
freq_wdata = 0x10 << 1;
break;
case 100 ... 109:
freq_wdata = 0x20 << 1;
break;
case 110 ... 129:
freq_wdata = 0x01 << 1;
break;
case 130 ... 139:
freq_wdata = 0x11 << 1;
break;
case 140 ... 149:
freq_wdata = 0x21 << 1;
break;
case 150 ... 169:
freq_wdata = 0x02 << 1;
break;
case 170 ... 179:
freq_wdata = 0x12 << 1;
break;
case 180 ... 199:
freq_wdata = 0x22 << 1;
break;
case 200 ... 219:
freq_wdata = 0x03 << 1;
break;
case 220 ... 239:
freq_wdata = 0x13 << 1;
break;
case 240 ... 249:
freq_wdata = 0x23 << 1;
break;
case 250 ... 269:
freq_wdata = 0x04 << 1;
break;
case 270 ... 299:
freq_wdata = 0x14 << 1;
break;
case 300 ... 329:
freq_wdata = 0x05 << 1;
break;
case 330 ... 359:
freq_wdata = 0x15 << 1;
break;
case 360 ... 399:
freq_wdata = 0x25 << 1;
break;
case 400 ... 449:
freq_wdata = 0x06 << 1;
break;
case 450 ... 499:
freq_wdata = 0x16 << 1;
break;
case 500 ... 549:
freq_wdata = 0x07 << 1;
break;
case 550 ... 599:
freq_wdata = 0x17 << 1;
break;
case 600 ... 649:
freq_wdata = 0x08 << 1;
break;
case 650 ... 699:
freq_wdata = 0x18 << 1;
break;
case 700 ... 749:
freq_wdata = 0x09 << 1;
break;
case 750 ... 799:
freq_wdata = 0x19 << 1;
break;
case 800 ... 849:
freq_wdata = 0x29 << 1;
break;
case 850 ... 899:
freq_wdata = 0x39 << 1;
break;
case 900 ... 949:
freq_wdata = 0x0a << 1;
break;
case 950 ... 999:
freq_wdata = 0x1a << 1;
break;
case 1000 ... 1049:
freq_wdata = 0x2a << 1;
break;
case 1050 ... 1099:
freq_wdata = 0x3a << 1;
break;
case 1100 ... 1149:
freq_wdata = 0x0b << 1;
break;
case 1150 ... 1199:
freq_wdata = 0x1b << 1;
break;
case 1200 ... 1249:
freq_wdata = 0x2b << 1;
break;
case 1250 ... 1299:
freq_wdata = 0x3b << 1;
break;
case 1300 ... 1349:
freq_wdata = 0x0c << 1;
break;
case 1350 ... 1399:
freq_wdata = 0x1c << 1;
break;
case 1400 ... 1449:
freq_wdata = 0x2c << 1;
break;
case 1450 ... 1499:
freq_wdata = 0x3c << 1;
break;
default:
freq_wdata = 0x00;
break;
}
dsi_dphy_cfg(base, 0x44, &freq_wdata, &freq_rdata);
}
void dsi_phy_init(void *base, ulong mclk, u32 lane)
void dsi_phy_init(void *base, ulong mclk, u32 lane, enum dsi_mode mode)
{
void *ANA2 = base + DSI_ANA_CFG2;
void *CFG = base + DSI_PHY_CFG;
@@ -284,6 +284,14 @@ void dsi_phy_init(void *base, ulong mclk, u32 lane)
reg_set_bits(CFG, DSI_PHY_CFG_DATA_LANE_MASK,
DSI_PHY_CFG_DATA_LANE(lane - 1));
aic_udelay(5);
if (mode & DSI_CLOCK_NON_CONTINUOUS) {
reg_clr_bit(CFG, DSI_PHY_CFG_HSCLK_REQ);
aic_udelay(5);
reg_set_bit(CFG, DSI_PHY_CFG_AUTO_CLK_EN);
aic_udelay(5);
}
reg_set_bit(CFG, DSI_PHY_CFG_RST_CLK_EN);
}
@@ -329,8 +337,6 @@ void dsi_set_vm(void *base, enum dsi_mode mode, enum dsi_format format,
if (unlikely(format >= DSI_FMT_MAX))
BUG();
if (unlikely(mode >= DSI_MOD_MAX))
BUG();
reg_clr_bit(IFCFG, DSI_DPI_IF_CFG_SHUTD);
reg_clr_bit(IFCFG, DSI_DPI_IF_CFG_COLORM);
@@ -351,7 +357,7 @@ void dsi_set_vm(void *base, enum dsi_mode mode, enum dsi_format format,
reg_clr_bit(INPOL, DSI_DPI_IN_POL_SHUTDOWN);
reg_clr_bit(INPOL, DSI_DPI_IN_POL_COLORM);
if (mode == DSI_MOD_CMD_MODE) {
if (mode & DSI_MOD_CMD_MODE) {
reg_set_bit(base + DSI_CTL, DSI_CTL_DSI_MODE);
reg_write(base + DSI_EDPI_CMD_SIZE, timing->hactive);
reg_clr_bit(CMDCFG, DSI_CMD_MODE_CFG_ACK_REQ_EN);
@@ -368,7 +374,7 @@ void dsi_set_vm(void *base, enum dsi_mode mode, enum dsi_format format,
reg_set_bit(VIDCFG, DSI_VID_MODE_CFG_LP_EN_VFP);
reg_set_bit(VIDCFG, DSI_VID_MODE_CFG_LP_EN_VACT);
reg_set_bit(VIDCFG, DSI_VID_MODE_CFG_LP_EN_HBP);
if (mode == DSI_MOD_VID_BURST)
if (mode & DSI_MOD_VID_BURST)
reg_set_bit(VIDCFG, DSI_VID_MODE_CFG_LP_EN_HFP);
else
reg_clr_bit(VIDCFG, DSI_VID_MODE_CFG_LP_EN_HFP);
@@ -478,7 +484,7 @@ void dsi_cmd_wr(void *base, u32 dt, u32 vc, const u8 *data, u32 len)
if (dt == DSI_DT_GEN_RD_P0 || dt == DSI_DT_GEN_RD_P1 ||
dt == DSI_DT_GEN_RD_P2 || dt == DSI_DT_DCS_RD_P0) {
reg_set_bit(CMDCFG, DSI_CMD_MODE_CFG_ACK_REQ_EN);
reg_clr_bit(CMDCFG, DSI_CMD_MODE_CFG_ACK_REQ_EN);
reg_set_bit(base + DSI_CTL, DSI_CTL_PKG_CFG_BTA_EN);
} else {
reg_clr_bit(CMDCFG, DSI_CMD_MODE_CFG_ACK_REQ_EN);