v1.1.1

bsp/artinchip/sys/d13x/Kconfig.chip

@@ -36,6 +36,16 @@ config CPU_BASE
     default 0xE0000000 if QEMU_RUN
     depends on AIC_CHIP_D13X
 
+config CPU_PSRAM_BASE
+    hex
+    default 0x40000000
+    depends on AIC_CHIP_D13X
+
+config CPU_SRAM_BASE
+    hex
+    default 0x30040000
+    depends on AIC_CHIP_D13X
+
 #--------------------------------------------
 # interrupt global option
 #--------------------------------------------

bsp/artinchip/sys/d13x/aic_gpio_id.c

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2022-2024, ArtInChip, Artinchip Technology Co., Ltd
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <aic_gpio_id.h>
+
+const int aic_gpio_groups_list[] = {
+    PA_GROUP,
+    PB_GROUP,
+    PC_GROUP,
+    PD_GROUP,
+    PE_GROUP,
+    PU_GROUP,
+};
+
+const int aic_gpio_group_size = sizeof(aic_gpio_groups_list) / sizeof(aic_gpio_groups_list[0]);

bsp/artinchip/sys/d13x/boot_param.c

@@ -67,6 +67,11 @@ void *aic_get_boot_resource(void)
     return (void *)(boot_params_stash.r.a[1]);
 }
 
+void aic_set_boot_resource(void *res_addr)
+{
+    boot_params_stash.r.a[1] = (u32)(uintptr_t)res_addr;
+}
+
 int aic_get_boot_image_id(void)
 {
     return get_boot_image_id(boot_params_stash.r.a[0]);

bsp/artinchip/sys/d13x/include/boot_param.h

@@ -85,6 +85,7 @@ enum boot_controller aic_get_boot_controller(void);
 int aic_get_boot_image_id(void);
 unsigned long aic_timer_get_us(void);
 void *aic_get_boot_resource(void);
+void aic_set_boot_resource(void *res_addr);
 void *aic_get_boot_resource_from_nand(void *dev, unsigned long pagesize,
                                       nand_read fn);
 void *aic_get_boot_args(void);

bsp/artinchip/sys/d13x/startup_gcc.S

@@ -223,6 +223,10 @@ e907_tcm_init:
     bltu    a0, a1, 1b
 2:
 
+    /* Reloc private params */
+    la      a5, reloc_private_params
+    jalr    a5
+
 #ifndef __NO_SYSTEM_INIT
     la      a5, SystemInit
     jalr    a5