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v1.0.3

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刘可亮
2024-01-27 08:47:24 +08:00
parent d3bd993b5f
commit 9f7ba67007
2345 changed files with 74421 additions and 76616 deletions
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54
bsp/artinchip/drv/pwm/drv_pwm.c
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@@ -16,6 +16,7 @@
#include "hal_pwm.h"
static struct rt_device_pwm g_aic_pwm = {0};
static struct aic_pwm_pulse_para g_pulse_para[AIC_PWM_CH_NUM] = {0};
static void aic_pwm_default_action(void)
{
@@ -23,12 +24,12 @@ static void aic_pwm_default_action(void)
/* CBD, CBU, CAD, */
PWM_ACT_NONE, PWM_ACT_NONE, PWM_ACT_NONE,
/* CAU, PRD, ZRO */
PWM_ACT_LOW, PWM_ACT_HIGH, PWM_ACT_NONE};
PWM_ACT_LOW, PWM_ACT_NONE, PWM_ACT_HIGH};
struct aic_pwm_action action1 = {
/* CBD, CBU, CAD, */
PWM_ACT_NONE, PWM_ACT_NONE, PWM_ACT_NONE,
/* CAU, PRD, ZRO */
PWM_ACT_LOW, PWM_ACT_HIGH, PWM_ACT_NONE};
PWM_ACT_LOW, PWM_ACT_NONE, PWM_ACT_HIGH};
#ifdef AIC_USING_PWM0
hal_pwm_ch_init(0, PWM_MODE_UP_COUNT, 0, &action0, &action1);
@@ -78,6 +79,26 @@ static rt_err_t drv_pwm_set(struct rt_device_pwm *device,
return RT_EOK;
}
static rt_err_t drv_pwm_set_pul(struct rt_device_pwm *device,
struct rt_pwm_configuration *cfg)
{
if (drv_pwm_ch_valid(cfg))
return -RT_EINVAL;
g_pulse_para[cfg->channel].pulse_cnt = cfg->pul_cnt;
g_pulse_para[cfg->channel].duty_ns = cfg->pulse;
g_pulse_para[cfg->channel].prd_ns = cfg->period;
hal_pwm_int_config(cfg->channel, cfg->irq_mode, 1);
if (hal_pwm_set(cfg->channel, cfg->pulse, cfg->period))
return -RT_ERROR;
hal_pwm_enable(cfg->channel);
return RT_EOK;
}
static rt_err_t drv_pwm_get(struct rt_device_pwm *device,
struct rt_pwm_configuration *cfg)
{
@@ -104,6 +125,8 @@ static rt_err_t drv_pwm_control(struct rt_device_pwm *device,
return drv_pwm_set(device, cfg);
case PWM_CMD_GET:
return drv_pwm_get(device, cfg);
case PWM_CMD_SET_PUL:
return drv_pwm_set_pul(device, cfg);
default:
LOG_I("Unsupported cmd: 0x%x", cmd);
return -RT_EINVAL;
@@ -158,11 +181,38 @@ static struct rt_device_pm_ops drv_pwm_pm_ops =
};
#endif
irqreturn_t aic_pwm_irq(int irq, void *arg)
{
static u32 isr_cnt[AIC_PWM_CH_NUM] = {0};
u32 stat;
int i;
stat = hal_pwm_int_sts();
for (i = 0; i < AIC_PWM_CH_NUM; i++) {
if (stat & (1 << i)) {
isr_cnt[i]++;
if (isr_cnt[i] == g_pulse_para[i].pulse_cnt) {
hal_pwm_set(i, g_pulse_para[i].prd_ns, g_pulse_para[i].prd_ns);
hal_pwm_int_config(i, 0, 0);
pr_info("\nisr cnt:%d,disabled the pwm%d interrupt now.\n", isr_cnt[i], i);
isr_cnt[i] = 0;
}
}
}
hal_pwm_clr_int(stat);
return IRQ_HANDLED;
}
int drv_pwm_init(void)
{
hal_pwm_init();
aic_pwm_default_action();
aicos_request_irq(PWM_IRQn, aic_pwm_irq, 0, NULL, NULL);
if (rt_device_pwm_register(&g_aic_pwm, "pwm", &aic_pwm_ops, NULL))
return -RT_ERROR;