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v1.0.3

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刘可亮
2024-01-27 08:47:24 +08:00
parent d3bd993b5f
commit 9f7ba67007
2345 changed files with 74421 additions and 76616 deletions
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7
bsp/peripheral/codec/Kconfig
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@@ -9,9 +9,16 @@ if AIC_I2S_CODEC_SELECT
config AIC_I2S_CODEC_ES8388
bool "es8388"
config AIC_I2S_CODEC_TLV320
bool "tlv320aic3101"
endchoice
endif
if AIC_I2S_CODEC_ES8388
source "bsp/peripheral/codec/es8388/Kconfig"
endif
if AIC_I2S_CODEC_TLV320
source "bsp/peripheral/codec/tlv320aic3101/Kconfig"
endif

6
bsp/peripheral/codec/SConscript
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@@ -3,7 +3,7 @@ Import('PRJ_KERNEL')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
src = []
CPPPATH = []
if GetDepend('AIC_I2S_CODEC_SELECT'):
@@ -14,6 +14,10 @@ if GetDepend('AIC_I2S_CODEC_ES8388'):
CPPPATH.append(cwd + 'es8388/')
src += Glob('es8388/*.c')
if GetDepend('AIC_I2S_CODEC_TLV320'):
CPPPATH.append(cwd + 'tlv320aic3101/')
src += Glob('tlv320aic3101/*.c')
group = DefineGroup('codec', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

1
bsp/peripheral/codec/codec.h
View File

@@ -11,6 +11,7 @@
#include <aic_core.h>
#include "hal_i2s_format.h"
extern struct codec *register_codec;
struct codec;
struct codec_ops {

31
bsp/peripheral/codec/tlv320aic3101/Kconfig Normal file
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@@ -0,0 +1,31 @@
menu "TLV320AIC3101 codec options"
config AIC_I2S_CODEC_TLV320_I2C
string "tlv320 i2c port select"
default "i2c1"
config AIC_I2S_CODEC_PA_PIN
string "PA shutdown pin"
default "PA.13"
choice
prompt "Select PA enable level"
default AIC_I2S_CODEC_PA_ENABLE_HIGH
config AIC_I2S_CODEC_PA_ENABLE_HIGH
bool "high level Active"
config AIC_I2S_CODEC_PA_ENABLE_LOW
bool "low level Active"
endchoice
config AIC_I2S_CODEC_MCLK_NFS
int "MCLK NFS"
default 256
config AIC_I2S_CODEC_SCLK_NFS
int "SCLK NFS"
default 64
endmenu

105
bsp/peripheral/codec/tlv320aic3101/tlv320aic3101.c Normal file
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@@ -0,0 +1,105 @@
/*
* Copyright (c) 2023-2024, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
* Authors: dwj <weijie.ding@artinchip.com>
*/
#include <rtthread.h>
#include <rtdevice.h>
#include "aic_hal_gpio.h"
#include "tlv320aic3101.h"
#define TLV320_ADDR 0x18
struct tlv320_device
{
struct rt_i2c_bus_device *i2c;
uint32_t pin;
};
static struct tlv320_device tlv320_dev = {0};
static void reg_write(uint8_t addr, uint8_t val)
{
struct rt_i2c_msg msgs[1] = {0};
uint8_t buff[2] = {0};
buff[0] = addr;
buff[1] = val;
msgs[0].addr = TLV320_ADDR;
msgs[0].flags = RT_I2C_WR;
msgs[0].buf = buff;
msgs[0].len = 2;
if (rt_i2c_transfer(tlv320_dev.i2c, msgs, 1) != 1)
{
rt_kprintf("I2C write data failed, reg = 0x%2x. \n", addr);
return;
}
}
int tlv320_init(struct codec *codec)
{
tlv320_dev.i2c = rt_i2c_bus_device_find(codec->i2c_name);
if (tlv320_dev.i2c == RT_NULL)
{
rt_kprintf("%s bus not found\n", codec->i2c_name);
return -RT_ERROR;
}
//reset pin
tlv320_dev.pin = codec->pa;
rt_pin_mode(tlv320_dev.pin, PIN_MODE_OUTPUT);
rt_pin_write(tlv320_dev.pin, 0);
rt_thread_delay(1);
rt_pin_write(tlv320_dev.pin, 1);
rt_thread_delay(2);
reg_write(TLV320_PAGE0_PSR, 0x0);
reg_write(TLV320_PAGE0_SRR, 0x80);
reg_write(TLV320_PAGE0_CR, 0x1);
reg_write(TLV320_PAGE0_CGCR, 0x2);
reg_write(TLV320_PAGE0_LEFTOL, 0x8);
reg_write(TLV320_PAGE0_RIGHTOL, 0x8);
reg_write(TLV320_PAGE0_CDPSR, 0xA); //Left Right data path
reg_write(TLV320_PAGE0_ASDICRB, 0x00);
reg_write(TLV320_PAGE0_DACPODCR, 0xC0); //dac POWER ON
reg_write(TLV320_PAGE0_DACOSCR, 0x50); //DAC L1/L3 select
reg_write(TLV320_PAGE0_ASDICRC, 0x1);
reg_write(TLV320_PAGE0_LDACDVCR, 0x46);
reg_write(TLV320_PAGE0_RDACDVCR, 0x46);
//ADC
reg_write(TLV320_PAGE0_LADCPGCR, 0x0);
reg_write(TLV320_PAGE0_RADCPGCR, 0x0);
reg_write(TLV320_PAGE0_MIC1LPLADC, 0x4); //MIC1LP
reg_write(TLV320_PAGE0_MIC1RPRADC, 0x4); //MIC1RP
reg_write(TLV320_PAGE0_MICBIAS, 0x40);
return RT_EOK;
}
struct codec_ops tlv320_ops =
{
.init = tlv320_init,
};
static struct codec tlv320 =
{
.name = "tlv320",
.i2c_name = AIC_I2S_CODEC_TLV320_I2C,
.addr = TLV320_ADDR,
.pa_name = AIC_I2S_CODEC_PA_PIN,
.ops = &tlv320_ops,
};
int rt_hw_tlv320_init(void)
{
tlv320.pa = hal_gpio_name2pin(tlv320.pa_name);
codec_register(&tlv320);
return 0;
}
INIT_DEVICE_EXPORT(rt_hw_tlv320_init);

43
bsp/peripheral/codec/tlv320aic3101/tlv320aic3101.h Normal file
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@@ -0,0 +1,43 @@
/*
* Copyright (c) 2023-2024, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
* Authors: dwj <weijie.ding@artinchip.com>
*/
#ifndef __DRV_TLV320AIC3101_H__
#define __DRV_TLV320AIC3101_H__
#include "codec.h"
#include "aic_common.h"
#define TLV320_PAGE0_PSR 0
#define TLV320_PAGE0_SRR 1
#define TLV320_PAGE0_CSRSR 2
#define TLV320_PAGE0_CDPSR 7
#define TLV320_PAGE0_ASDICRA 8
#define TLV320_PAGE0_ASDICRB 9
#define TLV320_PAGE0_ASDICRC 10
#define TLV320_PAGE0_LADCPGCR 15
#define TLV320_PAGE0_RADCPGCR 16
#define TLV320_PAGE0_MIC1LPLADC 19
#define TLV320_PAGE0_MIC1RPLADC 21
#define TLV320_PAGE0_MIC1RPRADC 22
#define TLV320_PAGE0_MIC1LPRADC 24
#define TLV320_PAGE0_MICBIAS 25
#define TLV320_PAGE0_DACPODCR 37
#define TLV320_PAGE0_DACOSCR 41
#define TLV320_PAGE0_LDACDVCR 43
#define TLV320_PAGE0_RDACDVCR 44
#define TLV320_PAGE0_DACL1L 82
#define TLV320_PAGE0_DACR1L 85
#define TLV320_PAGE0_LEFTOL 86
#define TLV320_PAGE0_DACL1R 89
#define TLV320_PAGE0_DACR1R 92
#define TLV320_PAGE0_RIGHTOL 93
#define TLV320_PAGE0_CR 101
#define TLV320_PAGE0_CGCR 102
#endif