/*
 * Copyright (c) 2022-2023, ArtInChip Technology Co., Ltd
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#ifndef __ARTINCHIP_DMA_ID_H_
#define __ARTINCHIP_DMA_ID_H_

#define DMA_ID_SRAM         0
#define DMA_ID_DRAM         0
#define DMA_ID_XIP          0
#define DMA_ID_PSADC_Q1     4
#define DMA_ID_PSADC_Q2     5
#define DMA_ID_SPI2         8
#define DMA_ID_SPI3         9
#define DMA_ID_SPI0         10
#define DMA_ID_SPI1         11
#define DMA_ID_I2S0         12
#define DMA_ID_I2S1         13
#define DMA_ID_AUDIO_DMIC   14
#define DMA_ID_UART0        16
#define DMA_ID_UART1        17
#define DMA_ID_UART2        18
#define DMA_ID_UART3        19
#define DMA_ID_UART4        20
#define DMA_ID_UART5        21
#define DMA_ID_UART6        22
#define DMA_ID_UART7        23
#define DMA_ID_XSPI         24

#define AIC_DMA_PORTS       25

#endif