mirror of
https://gitee.com/Vancouver2017/luban-lite-t3e-pro.git
synced 2025-12-15 02:48:54 +00:00
1415 lines
39 KiB
C
1415 lines
39 KiB
C
/*
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* Copyright (c) 2022, sakumisu
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "usb_ehci_priv.h"
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struct ehci_hcd g_ehci_hcd;
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USB_NOCACHE_RAM_SECTION struct ehci_qh_hw ehci_qh_pool[CONFIG_USB_EHCI_QH_NUM];
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USB_NOCACHE_RAM_SECTION struct ehci_qtd_hw ehci_qtd_pool[CONFIG_USB_EHCI_QTD_NUM];
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/* The head of the asynchronous queue */
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USB_NOCACHE_RAM_SECTION struct ehci_qh_hw g_async_qh_head;
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/* The head of the periodic queue */
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USB_NOCACHE_RAM_SECTION struct ehci_qh_hw g_periodic_qh_head[EHCI_PERIOIDIC_QH_NUM];
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/* The frame list */
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USB_NOCACHE_RAM_SECTION uint32_t g_framelist[CONFIG_USB_EHCI_FRAME_LIST_SIZE] __attribute__((aligned(4096)));
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static const uint8_t g_ehci_speed[4] = {
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0, EHCI_LOW_SPEED, EHCI_FULL_SPEED, EHCI_HIGH_SPEED
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};
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#ifdef CONFIG_USB_DCACHE_ENABLE
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void usb_ehci_dcache_clean(uintptr_t addr, uint32_t len);
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void usb_ehci_dcache_invalidate(uintptr_t addr, uint32_t len);
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void usb_ehci_dcache_clean_invalidate(uintptr_t addr, uint32_t len);
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static int usb_ehci_qtd_flush(struct ehci_qtd_hw *qtd)
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{
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/* Flush the D-Cache, i.e., make the contents of the memory match the
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* contents of the D-Cache in the specified address range and invalidate
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* the D-Cache to force re-loading of the data from memory when next
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* accessed.
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*/
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usb_ehci_dcache_clean_invalidate((uintptr_t)&qtd->hw, sizeof(struct ehci_qtd_hw));
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return 0;
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}
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static int usb_ehci_qh_flush(struct ehci_qh_hw *qh)
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{
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struct ehci_qtd_hw *qtd;
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struct ehci_qtd_hw *next;
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/* Flush the QH first. This will write the contents of the D-cache to RAM
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* and invalidate the contents of the D-cache so that the next access will
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* be reloaded from D-Cache.
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*/
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usb_ehci_dcache_clean_invalidate((uintptr_t)&qh->hw, sizeof(struct ehci_qh_hw));
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/* Then flush all of the qTD entries in the queue */
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if ((qh->first_qtd & QTD_LIST_END) == 0) {
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qtd = (struct ehci_qtd_hw *)(uintptr_t)qh->first_qtd;
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while (qtd) {
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if (qtd->hw.next_qtd & QTD_LIST_END) {
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next = NULL;
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} else {
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next = (struct ehci_qtd_hw *)(uintptr_t)qtd->hw.next_qtd;
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}
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usb_ehci_qtd_flush(qtd);
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qtd = next;
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}
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}
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return 0;
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}
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#else
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#define usb_ehci_dcache_clean(addr, len)
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#define usb_ehci_dcache_invalidate(addr, len)
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#define usb_ehci_dcache_clean_invalidate(addr, len)
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#define usb_ehci_qtd_flush(qtd, bp, arg)
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#define usb_ehci_qh_flush(qh)
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#endif
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static struct ehci_qh_hw *ehci_qh_alloc(void)
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{
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struct ehci_qh_hw *qh;
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for (uint32_t i = 0; i < CONFIG_USB_EHCI_QH_NUM; i++) {
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if (!g_ehci_hcd.ehci_qh_used[i]) {
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g_ehci_hcd.ehci_qh_used[i] = true;
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qh = &ehci_qh_pool[i];
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memset(qh, 0, sizeof(struct ehci_qh_hw));
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qh->hw.hlp = QTD_LIST_END;
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qh->hw.overlay.next_qtd = QTD_LIST_END;
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qh->hw.overlay.alt_next_qtd = QTD_LIST_END;
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return qh;
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}
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}
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return NULL;
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}
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static void ehci_qh_free(struct ehci_qh_hw *qh)
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{
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for (uint32_t i = 0; i < CONFIG_USB_EHCI_QH_NUM; i++) {
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if (&ehci_qh_pool[i] == qh) {
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g_ehci_hcd.ehci_qh_used[i] = false;
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return;
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}
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}
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}
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static struct ehci_qtd_hw *ehci_qtd_alloc(void)
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{
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struct ehci_qtd_hw *qtd;
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for (uint32_t i = 0; i < CONFIG_USB_EHCI_QTD_NUM; i++) {
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if (!g_ehci_hcd.ehci_qtd_used[i]) {
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g_ehci_hcd.ehci_qtd_used[i] = true;
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qtd = &ehci_qtd_pool[i];
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memset(qtd, 0, sizeof(struct ehci_qtd_hw));
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qtd->hw.next_qtd = QTD_LIST_END;
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qtd->hw.alt_next_qtd = QTD_LIST_END;
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qtd->hw.token = QTD_TOKEN_STATUS_HALTED;
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return qtd;
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}
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}
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return NULL;
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}
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static void ehci_qtd_free(struct ehci_qtd_hw *qtd)
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{
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#ifdef CONFIG_USB_DCACHE_ENABLE
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if (qtd->align_buffer) {
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aicos_free_align(0, qtd->align_buffer);
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qtd->align_buffer = 0;
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}
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#endif
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for (uint32_t i = 0; i < CONFIG_USB_EHCI_QTD_NUM; i++) {
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if (&ehci_qtd_pool[i] == qtd) {
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g_ehci_hcd.ehci_qtd_used[i] = false;
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return;
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}
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}
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}
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static struct ehci_pipe *ehci_pipe_alloc(void)
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{
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int pipe;
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for (pipe = 0; pipe < CONFIG_USB_EHCI_QH_NUM; pipe++) {
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if (!g_ehci_hcd.pipe_pool[pipe].inuse) {
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g_ehci_hcd.pipe_pool[pipe].inuse = true;
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return &g_ehci_hcd.pipe_pool[pipe];
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}
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}
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return NULL;
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}
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static void ehci_pipe_free(struct ehci_pipe *pipe)
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{
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pipe->inuse = false;
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}
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static inline void ehci_qh_add_head(struct ehci_qh_hw *head, struct ehci_qh_hw *n)
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{
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n->hw.hlp = head->hw.hlp;
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usb_ehci_qh_flush(n);
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usb_ehci_dcache_invalidate((uintptr_t)&head->hw, CACHE_LINE_SIZE);
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head->hw.hlp = QH_HLP_QH(n);
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usb_ehci_dcache_clean((uintptr_t)&head->hw, CACHE_LINE_SIZE);
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}
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static inline void ehci_qh_remove(struct ehci_qh_hw *head, struct ehci_qh_hw *n)
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{
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struct ehci_qh_hw *tmp = head;
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usb_ehci_dcache_invalidate((uintptr_t)&tmp->hw, CACHE_LINE_SIZE);
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while (EHCI_ADDR2QH(tmp->hw.hlp) && EHCI_ADDR2QH(tmp->hw.hlp) != n) {
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tmp = EHCI_ADDR2QH(tmp->hw.hlp);
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usb_ehci_dcache_invalidate((uintptr_t)&tmp->hw, CACHE_LINE_SIZE);
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}
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if (tmp) {
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tmp->hw.hlp = n->hw.hlp;
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usb_ehci_dcache_clean((uintptr_t)&tmp->hw, CACHE_LINE_SIZE);
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}
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}
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static int ehci_caculate_smask(int binterval)
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{
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int order, interval;
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interval = 1;
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while (binterval > 1) {
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interval *= 2;
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binterval--;
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}
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if (interval < 2) /* interval 1 */
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return 0xFF;
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if (interval < 4) /* interval 2 */
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return 0x55;
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if (interval < 8) /* interval 4 */
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return 0x22;
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for (order = 0; (interval > 1); order++) {
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interval >>= 1;
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}
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return (0x1 << (order % 8));
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}
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static struct ehci_qh_hw *ehci_get_periodic_qhead(uint8_t interval)
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{
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interval /= 8;
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for (uint8_t i = 0; i < EHCI_PERIOIDIC_QH_NUM - 1; i++) {
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interval >>= 1;
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if (interval == 0) {
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return &g_periodic_qh_head[i];
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}
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}
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return &g_periodic_qh_head[EHCI_PERIOIDIC_QH_NUM - 1];
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}
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static void ehci_qh_fill(struct ehci_qh_hw *qh,
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struct ehci_pipe *pipe)
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{
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struct usbh_hub *hub;
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uint32_t regval;
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/* QH endpoint characteristics:
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*
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* FIELD DESCRIPTION
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* -------- -------------------------------
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* DEVADDR Device address
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* I Inactivate on Next Transaction
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* ENDPT Endpoint number
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* EPS Endpoint speed
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* DTC Data toggle control
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* MAXPKT Max packet size
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* C Control endpoint
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* RL NAK count reloaded
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*/
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regval = ((uint32_t)pipe->dev_addr << QH_EPCHAR_DEVADDR_SHIFT) |
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((uint32_t)(pipe->ep_addr & 0xf) << QH_EPCHAR_ENDPT_SHIFT) |
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((uint32_t)g_ehci_speed[pipe->speed] << QH_EPCHAR_EPS_SHIFT) |
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((uint32_t)pipe->ep_mps << QH_EPCHAR_MAXPKT_SHIFT) |
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QH_EPCHAR_DTC |
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((uint32_t)0 << QH_EPCHAR_RL_SHIFT);
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if (pipe->ep_type == USB_ENDPOINT_TYPE_CONTROL && (pipe->speed != USB_SPEED_HIGH)) {
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regval |= QH_EPCHAR_C;
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}
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qh->hw.epchar = regval;
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/* QH endpoint capabilities
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*
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* FIELD DESCRIPTION
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* -------- -------------------------------
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* SSMASK Interrupt Schedule Mask
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* SCMASK Split Completion Mask
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* HUBADDR Hub Address
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* PORT Port number
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* MULT High band width multiplier
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*/
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regval = 0;
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hub = pipe->hport->parent;
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regval |= QH_EPCAPS_HUBADDR(hub->hub_addr);
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regval |= QH_EPCAPS_PORT(pipe->hport->port);
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regval |= QH_EPCAPS_MULT(1);
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if (pipe->ep_type == USB_ENDPOINT_TYPE_INTERRUPT) {
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if (pipe->speed == USB_SPEED_HIGH) {
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regval |= ehci_caculate_smask(pipe->ep_interval);
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} else {
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regval |= QH_EPCAPS_SSMASK(2);
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regval |= QH_EPCAPS_SCMASK(0x78);
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}
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regval |= QH_EPCAPS_MULT(1);
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}
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qh->hw.epcap = regval;
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qh->pipe = pipe;
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}
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static void ehci_qtd_bpl_fill(struct ehci_qtd_hw *qtd, uint32_t bufaddr, size_t buflen)
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{
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uint32_t rest;
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#ifdef CONFIG_USB_DCACHE_ENABLE
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if (((bufaddr % CACHE_LINE_SIZE) != 0) ||
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(((bufaddr + buflen) % CACHE_LINE_SIZE) != 0)) {
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qtd->align_buffer = aicos_malloc_align(0, buflen, CACHE_LINE_SIZE);
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if (NULL == qtd->align_buffer) {
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USB_LOG_ERR("alloc error.\r\n");
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return;
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}
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/* out direction */
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if (qtd->dir_in == 0) {
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memcpy(qtd->align_buffer, (void *)(uintptr_t)bufaddr, buflen);
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}
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qtd->buffer = (void *)(uintptr_t)bufaddr;
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qtd->buffer_len = buflen;
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bufaddr = (uint32_t)(uintptr_t)qtd->align_buffer;
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} else {
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qtd->align_buffer = 0;
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qtd->buffer = (void *)(uintptr_t)bufaddr;
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qtd->buffer_len = buflen;
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}
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usb_ehci_dcache_clean_invalidate((uintptr_t)bufaddr, buflen);
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#endif
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qtd->hw.bpl[0] = bufaddr;
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rest = 0x1000 - (bufaddr & 0xfff);
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if (buflen < rest) {
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rest = buflen;
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} else {
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bufaddr += 0x1000;
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bufaddr &= ~0x0fff;
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for (int i = 1; rest < buflen && i < 5; i++) {
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qtd->hw.bpl[i] = bufaddr;
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bufaddr += 0x1000;
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if ((rest + 0x1000) < buflen) {
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rest += 0x1000;
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} else {
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rest = buflen;
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}
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}
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}
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}
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static void ehci_qtd_fill(struct ehci_pipe *pipe, struct ehci_qtd_hw *qtd, uint32_t bufaddr, size_t buflen, uint32_t token)
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{
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/* qTD token
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*
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* FIELD DESCRIPTION
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* -------- -------------------------------
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* STATUS Status
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* PID PID Code
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* CERR Error Counter
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* CPAGE Current Page
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* IOC Interrupt on complete
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* NBYTES Total Bytes to Transfer
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* TOGGLE Data Toggle
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*/
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qtd->hw.token = token;
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ehci_qtd_bpl_fill(qtd, bufaddr, buflen);
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pipe->xfrd += buflen;
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}
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static struct ehci_qh_hw *ehci_control_pipe_init(struct ehci_pipe *pipe, struct usb_setup_packet *setup, uint8_t *buffer, uint32_t buflen)
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{
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struct ehci_qh_hw *qh = NULL;
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struct ehci_qtd_hw *qtd_setup = NULL;
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struct ehci_qtd_hw *qtd_data = NULL;
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struct ehci_qtd_hw *qtd_status = NULL;
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uint32_t token;
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size_t flags;
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qh = ehci_qh_alloc();
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if (qh == NULL) {
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return NULL;
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}
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qtd_setup = ehci_qtd_alloc();
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if (buflen > 0) {
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qtd_data = ehci_qtd_alloc();
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}
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qtd_status = ehci_qtd_alloc();
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if (qtd_status == NULL) {
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ehci_qh_free(qh);
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if (qtd_setup) {
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ehci_qtd_free(qtd_setup);
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}
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if (qtd_data) {
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ehci_qtd_free(qtd_data);
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}
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return NULL;
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}
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ehci_qh_fill(qh, pipe);
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/* fill setup qtd */
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token = QTD_TOKEN_STATUS_ACTIVE |
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QTD_TOKEN_PID_SETUP |
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((uint32_t)3 << QTD_TOKEN_CERR_SHIFT) |
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((uint32_t)8 << QTD_TOKEN_NBYTES_SHIFT);
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#ifdef CONFIG_USB_DCACHE_ENABLE
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qtd_setup->dir_in = 0;
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#endif
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ehci_qtd_fill(pipe, qtd_setup, EHCI_PTR2ADDR(setup), 8, token);
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/* fill data qtd */
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if (setup->wLength > 0) {
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if ((setup->bmRequestType & 0x80) == 0x80) {
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token = QTD_TOKEN_PID_IN;
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#ifdef CONFIG_USB_DCACHE_ENABLE
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qtd_data->dir_in = 1;
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#endif
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} else {
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token = QTD_TOKEN_PID_OUT;
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#ifdef CONFIG_USB_DCACHE_ENABLE
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qtd_data->dir_in = 0;
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#endif
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}
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token |= QTD_TOKEN_STATUS_ACTIVE |
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QTD_TOKEN_PID_OUT |
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QTD_TOKEN_TOGGLE |
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((uint32_t)3 << QTD_TOKEN_CERR_SHIFT) |
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((uint32_t)buflen << QTD_TOKEN_NBYTES_SHIFT);
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ehci_qtd_fill(pipe, qtd_data, EHCI_PTR2ADDR(buffer), buflen, token);
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qtd_setup->hw.next_qtd = EHCI_PTR2ADDR(qtd_data);
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qtd_data->hw.next_qtd = EHCI_PTR2ADDR(qtd_status);
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} else {
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qtd_setup->hw.next_qtd = EHCI_PTR2ADDR(qtd_status);
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}
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/* fill status qtd */
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if ((setup->bmRequestType & 0x80) == 0x80) {
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token = QTD_TOKEN_PID_OUT;
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#ifdef CONFIG_USB_DCACHE_ENABLE
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qtd_status->dir_in = 0;
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#endif
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} else {
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token = QTD_TOKEN_PID_IN;
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#ifdef CONFIG_USB_DCACHE_ENABLE
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qtd_status->dir_in = 1;
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#endif
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}
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token |= QTD_TOKEN_STATUS_ACTIVE |
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QTD_TOKEN_TOGGLE |
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QTD_TOKEN_IOC |
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((uint32_t)3 << QTD_TOKEN_CERR_SHIFT) |
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((uint32_t)0 << QTD_TOKEN_NBYTES_SHIFT);
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ehci_qtd_fill(pipe, qtd_status, 0, 0, token);
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qtd_status->hw.next_qtd = QTD_LIST_END;
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/* update qh first qtd */
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qh->hw.overlay.next_qtd = EHCI_PTR2ADDR(qtd_setup);
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/* record qh first qtd */
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qh->first_qtd = EHCI_PTR2ADDR(qtd_setup);
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flags = usb_osal_enter_critical_section();
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pipe->qh = qh;
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/* add qh into async list */
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ehci_qh_add_head(&g_async_qh_head, qh);
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usb_osal_leave_critical_section(flags);
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return qh;
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}
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static struct ehci_qh_hw *ehci_bulk_pipe_init(struct ehci_pipe *pipe, uint8_t *buffer, uint32_t buflen)
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{
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struct ehci_qh_hw *qh = NULL;
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struct ehci_qtd_hw *qtd = NULL;
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struct ehci_qtd_hw *first_qtd = NULL;
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struct ehci_qtd_hw *prev_qtd = NULL;
|
|
uint32_t qtd_num = 0;
|
|
uint32_t xfer_len = 0;
|
|
uint32_t token;
|
|
size_t flags;
|
|
|
|
qh = ehci_qh_alloc();
|
|
if (qh == NULL) {
|
|
return NULL;
|
|
}
|
|
|
|
for (uint32_t i = 0; i < CONFIG_USB_EHCI_QTD_NUM; i++) {
|
|
if (!g_ehci_hcd.ehci_qtd_used[i]) {
|
|
qtd_num++;
|
|
}
|
|
}
|
|
|
|
if (qtd_num < ((buflen + 0x3fff) / 0x4000)) {
|
|
ehci_qh_free(qh);
|
|
return NULL;
|
|
}
|
|
|
|
ehci_qh_fill(qh, pipe);
|
|
|
|
while (buflen >= 0) {
|
|
qtd = ehci_qtd_alloc();
|
|
|
|
if (buflen > 0x4000) {
|
|
xfer_len = 0x4000;
|
|
buflen -= 0x4000;
|
|
} else {
|
|
xfer_len = buflen;
|
|
buflen = 0;
|
|
}
|
|
|
|
/* fill qtd */
|
|
if (pipe->toggle) {
|
|
token = QTD_TOKEN_TOGGLE;
|
|
} else {
|
|
token = 0;
|
|
}
|
|
|
|
if (pipe->ep_addr & 0x80) {
|
|
token |= QTD_TOKEN_PID_IN;
|
|
#ifdef CONFIG_USB_DCACHE_ENABLE
|
|
qtd->dir_in = 1;
|
|
#endif
|
|
} else {
|
|
token |= QTD_TOKEN_PID_OUT;
|
|
#ifdef CONFIG_USB_DCACHE_ENABLE
|
|
qtd->dir_in = 0;
|
|
#endif
|
|
}
|
|
|
|
token |= QTD_TOKEN_STATUS_ACTIVE |
|
|
((uint32_t)3 << QTD_TOKEN_CERR_SHIFT) |
|
|
((uint32_t)xfer_len << QTD_TOKEN_NBYTES_SHIFT);
|
|
|
|
if (buflen == 0) {
|
|
token |= QTD_TOKEN_IOC;
|
|
}
|
|
|
|
ehci_qtd_fill(pipe, qtd, (uint32_t)(uintptr_t)buffer, xfer_len, token);
|
|
qtd->hw.next_qtd = QTD_LIST_END;
|
|
buffer += xfer_len;
|
|
|
|
if (prev_qtd) {
|
|
prev_qtd->hw.next_qtd = EHCI_PTR2ADDR(qtd);
|
|
} else {
|
|
first_qtd = qtd;
|
|
}
|
|
prev_qtd = qtd;
|
|
|
|
if (buflen == 0) {
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* update qh first qtd */
|
|
qh->hw.overlay.next_qtd = EHCI_PTR2ADDR(first_qtd);
|
|
|
|
/* record qh first qtd */
|
|
qh->first_qtd = EHCI_PTR2ADDR(first_qtd);
|
|
|
|
flags = usb_osal_enter_critical_section();
|
|
|
|
pipe->qh = qh;
|
|
/* add qh into async list */
|
|
ehci_qh_add_head(&g_async_qh_head, qh);
|
|
|
|
usb_osal_leave_critical_section(flags);
|
|
return qh;
|
|
}
|
|
|
|
static struct ehci_qh_hw *ehci_intr_pipe_init(struct ehci_pipe *pipe, uint8_t *buffer, uint32_t buflen)
|
|
{
|
|
struct ehci_qh_hw *qh = NULL;
|
|
struct ehci_qtd_hw *qtd = NULL;
|
|
struct ehci_qtd_hw *first_qtd = NULL;
|
|
struct ehci_qtd_hw *prev_qtd = NULL;
|
|
uint32_t qtd_num = 0;
|
|
uint32_t xfer_len = 0;
|
|
uint32_t token;
|
|
size_t flags;
|
|
|
|
qh = ehci_qh_alloc();
|
|
if (qh == NULL) {
|
|
return NULL;
|
|
}
|
|
|
|
for (uint32_t i = 0; i < CONFIG_USB_EHCI_QTD_NUM; i++) {
|
|
if (!g_ehci_hcd.ehci_qtd_used[i]) {
|
|
qtd_num++;
|
|
}
|
|
}
|
|
|
|
if (qtd_num < ((buflen + 0x3fff) / 0x4000)) {
|
|
ehci_qh_free(qh);
|
|
return NULL;
|
|
}
|
|
|
|
ehci_qh_fill(qh, pipe);
|
|
|
|
while (buflen >= 0) {
|
|
qtd = ehci_qtd_alloc();
|
|
|
|
if (buflen > 0x4000) {
|
|
xfer_len = 0x4000;
|
|
buflen -= 0x4000;
|
|
} else {
|
|
xfer_len = buflen;
|
|
buflen = 0;
|
|
}
|
|
|
|
/* fill qtd */
|
|
if (pipe->toggle) {
|
|
token = QTD_TOKEN_TOGGLE;
|
|
} else {
|
|
token = 0;
|
|
}
|
|
|
|
if (pipe->ep_addr & 0x80) {
|
|
token |= QTD_TOKEN_PID_IN;
|
|
#ifdef CONFIG_USB_DCACHE_ENABLE
|
|
qtd->dir_in = 1;
|
|
#endif
|
|
} else {
|
|
token |= QTD_TOKEN_PID_OUT;
|
|
#ifdef CONFIG_USB_DCACHE_ENABLE
|
|
qtd->dir_in = 0;
|
|
#endif
|
|
}
|
|
|
|
token |= QTD_TOKEN_STATUS_ACTIVE |
|
|
((uint32_t)3 << QTD_TOKEN_CERR_SHIFT) |
|
|
((uint32_t)xfer_len << QTD_TOKEN_NBYTES_SHIFT);
|
|
|
|
if (buflen == 0) {
|
|
token |= QTD_TOKEN_IOC;
|
|
}
|
|
|
|
ehci_qtd_fill(pipe, qtd, (uint32_t)(uintptr_t)buffer, xfer_len, token);
|
|
qtd->hw.next_qtd = QTD_LIST_END;
|
|
buffer += xfer_len;
|
|
|
|
if (prev_qtd) {
|
|
prev_qtd->hw.next_qtd = EHCI_PTR2ADDR(qtd);
|
|
} else {
|
|
first_qtd = qtd;
|
|
}
|
|
prev_qtd = qtd;
|
|
|
|
if (buflen == 0) {
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* update qh first qtd */
|
|
qh->hw.overlay.next_qtd = EHCI_PTR2ADDR(first_qtd);
|
|
|
|
/* record qh first qtd */
|
|
qh->first_qtd = EHCI_PTR2ADDR(first_qtd);
|
|
|
|
flags = usb_osal_enter_critical_section();
|
|
|
|
pipe->qh = qh;
|
|
/* add qh into periodic list */
|
|
if (pipe->speed == USB_SPEED_HIGH) {
|
|
ehci_qh_add_head(ehci_get_periodic_qhead(pipe->ep_interval), qh);
|
|
} else {
|
|
ehci_qh_add_head(ehci_get_periodic_qhead(pipe->ep_interval * 8), qh);
|
|
}
|
|
usb_osal_leave_critical_section(flags);
|
|
return qh;
|
|
}
|
|
|
|
void ehci_pipe_waitup(struct ehci_pipe *pipe)
|
|
{
|
|
struct usbh_urb *urb;
|
|
|
|
urb = pipe->urb;
|
|
pipe->urb = NULL;
|
|
|
|
if (pipe->waiter) {
|
|
pipe->waiter = false;
|
|
usb_osal_sem_give(pipe->waitsem);
|
|
}
|
|
|
|
if (urb->complete) {
|
|
if (urb->errorcode < 0) {
|
|
urb->complete(urb->arg, urb->errorcode);
|
|
} else {
|
|
urb->complete(urb->arg, urb->actual_length);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void ehci_qh_scan_qtds(struct ehci_qh_hw *qh, struct ehci_pipe *pipe)
|
|
{
|
|
struct ehci_qtd_hw *qtd;
|
|
struct ehci_qtd_hw *next;
|
|
|
|
if ((qh->first_qtd & QTD_LIST_END) == 0) {
|
|
qtd = (struct ehci_qtd_hw *)(uintptr_t)qh->first_qtd;
|
|
while (qtd) {
|
|
usb_ehci_dcache_invalidate((uintptr_t)&qtd->hw, sizeof(struct ehci_qtd));
|
|
|
|
if (qtd->hw.next_qtd & QTD_LIST_END) {
|
|
next = NULL;
|
|
} else {
|
|
next = (struct ehci_qtd_hw *)(uintptr_t)qtd->hw.next_qtd;
|
|
}
|
|
|
|
qh->first_qtd = qtd->hw.next_qtd;
|
|
|
|
if (pipe) {
|
|
pipe->xfrd -= (qtd->hw.token & QTD_TOKEN_NBYTES_MASK) >>
|
|
QTD_TOKEN_NBYTES_SHIFT;
|
|
}
|
|
|
|
#ifdef CONFIG_USB_DCACHE_ENABLE
|
|
if ((qtd->align_buffer) && (qtd->dir_in == 1)) {
|
|
memcpy(qtd->buffer, qtd->align_buffer, qtd->buffer_len);
|
|
}
|
|
#endif
|
|
|
|
ehci_qtd_free(qtd);
|
|
|
|
qtd = next;
|
|
}
|
|
}
|
|
}
|
|
|
|
static void ehci_check_qh(struct ehci_qh_hw *qhead, struct ehci_qh_hw *qh, struct ehci_pipe *pipe)
|
|
{
|
|
struct usbh_urb *urb;
|
|
uint32_t token;
|
|
|
|
usb_ehci_dcache_invalidate((uintptr_t)&qh->hw, sizeof(struct ehci_qh));
|
|
|
|
token = qh->hw.overlay.token;
|
|
|
|
if (token & QTD_TOKEN_STATUS_ACTIVE) {
|
|
} else {
|
|
urb = pipe->urb;
|
|
|
|
ehci_qh_scan_qtds(qh, pipe);
|
|
if (qh->first_qtd & QTD_LIST_END) {
|
|
/* remove qh from list */
|
|
ehci_qh_remove(qhead, qh);
|
|
|
|
if ((token & QTD_TOKEN_STATUS_ERRORS) == 0) {
|
|
if (token & QTD_TOKEN_TOGGLE) {
|
|
pipe->toggle = true;
|
|
} else {
|
|
pipe->toggle = false;
|
|
}
|
|
urb->errorcode = 0;
|
|
} else {
|
|
if (token & QTD_TOKEN_STATUS_BABBLE) {
|
|
urb->errorcode = -EPERM;
|
|
pipe->toggle = 0;
|
|
} else if (token & QTD_TOKEN_STATUS_HALTED) {
|
|
urb->errorcode = -EPERM;
|
|
pipe->toggle = 0;
|
|
} else if (token & (QTD_TOKEN_STATUS_DBERR | QTD_TOKEN_STATUS_XACTERR)) {
|
|
urb->errorcode = -EIO;
|
|
}
|
|
}
|
|
|
|
urb->actual_length = pipe->xfrd;
|
|
ehci_qh_free(qh);
|
|
pipe->qh = NULL;
|
|
|
|
ehci_pipe_waitup(pipe);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void ehci_kill_qh(struct ehci_qh_hw *qhead, struct ehci_qh_hw *qh)
|
|
{
|
|
ehci_qh_remove(qhead, qh);
|
|
ehci_qh_scan_qtds(qh, NULL);
|
|
ehci_qh_free(qh);
|
|
}
|
|
|
|
static int usbh_reset_port(const uint8_t port)
|
|
{
|
|
uint32_t timeout = 0;
|
|
uint32_t regval;
|
|
|
|
#if defined(CONFIG_USB_EHCI_HPMICRO) && CONFIG_USB_EHCI_HPMICRO
|
|
if ((*(volatile uint32_t *)(CONFIG_HPM_USB_BASE + 0x224) & 0xc0) == (2 << 6)) { /* Hardcode for hpm */
|
|
EHCI_HCOR->portsc[port - 1] |= (1 << 29);
|
|
} else {
|
|
EHCI_HCOR->portsc[port - 1] &= ~(1 << 29);
|
|
}
|
|
#endif
|
|
regval = EHCI_HCOR->portsc[port - 1];
|
|
regval &= ~EHCI_PORTSC_PE;
|
|
regval |= EHCI_PORTSC_RESET;
|
|
EHCI_HCOR->portsc[port - 1] = regval;
|
|
usb_osal_msleep(55);
|
|
|
|
EHCI_HCOR->portsc[port - 1] &= ~EHCI_PORTSC_RESET;
|
|
while ((EHCI_HCOR->portsc[port - 1] & EHCI_PORTSC_RESET) != 0) {
|
|
usb_osal_msleep(1);
|
|
timeout++;
|
|
if (timeout > 100) {
|
|
return -ETIMEDOUT;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
__WEAK void usb_hc_low_level_init(void)
|
|
{
|
|
}
|
|
|
|
__WEAK void usb_hc_low_level2_init(void)
|
|
{
|
|
}
|
|
|
|
int usb_hc_init(void)
|
|
{
|
|
uint32_t interval;
|
|
struct ehci_qh_hw *qh;
|
|
|
|
uint32_t timeout = 0;
|
|
uint32_t regval;
|
|
|
|
memset(&g_ehci_hcd, 0, sizeof(struct ehci_hcd));
|
|
|
|
if (sizeof(struct ehci_qh_hw) % 32) {
|
|
USB_LOG_ERR("struct ehci_qh_hw is not align 32\r\n");
|
|
return -EINVAL;
|
|
}
|
|
if (sizeof(struct ehci_qtd_hw) % 32) {
|
|
USB_LOG_ERR("struct ehci_qtd_hw is not align 32\r\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
for (uint8_t index = 0; index < CONFIG_USB_EHCI_QH_NUM; index++) {
|
|
struct ehci_pipe *pipe;
|
|
|
|
pipe = &g_ehci_hcd.pipe_pool[index];
|
|
pipe->waitsem = usb_osal_sem_create(0);
|
|
}
|
|
|
|
memset(&g_async_qh_head, 0, sizeof(struct ehci_qh_hw));
|
|
g_async_qh_head.hw.hlp = QH_HLP_QH(&g_async_qh_head);
|
|
g_async_qh_head.hw.epchar = QH_EPCHAR_H;
|
|
g_async_qh_head.hw.overlay.next_qtd = QTD_LIST_END;
|
|
g_async_qh_head.hw.overlay.alt_next_qtd = QTD_LIST_END;
|
|
g_async_qh_head.hw.overlay.token = QTD_TOKEN_STATUS_HALTED;
|
|
g_async_qh_head.first_qtd = QTD_LIST_END;
|
|
|
|
usb_ehci_dcache_clean((uintptr_t)&g_async_qh_head.hw, sizeof(struct ehci_qh_hw));
|
|
|
|
memset(g_framelist, 0, sizeof(uint32_t) * CONFIG_USB_EHCI_FRAME_LIST_SIZE);
|
|
|
|
for (int i = EHCI_PERIOIDIC_QH_NUM - 1; i >= 0; i--) {
|
|
memset(&g_periodic_qh_head[i], 0, sizeof(struct ehci_qh_hw));
|
|
g_periodic_qh_head[i].hw.hlp = QH_HLP_END;
|
|
g_periodic_qh_head[i].hw.epchar = QH_EPCAPS_SSMASK(1);
|
|
g_periodic_qh_head[i].hw.overlay.next_qtd = QTD_LIST_END;
|
|
g_periodic_qh_head[i].hw.overlay.alt_next_qtd = QTD_LIST_END;
|
|
g_periodic_qh_head[i].hw.overlay.token = QTD_TOKEN_STATUS_HALTED;
|
|
g_periodic_qh_head[i].first_qtd = QTD_LIST_END;
|
|
|
|
interval = 1 << i;
|
|
for (uint32_t j = interval - 1; j < CONFIG_USB_EHCI_FRAME_LIST_SIZE; j += interval) {
|
|
if (g_framelist[j] == 0) {
|
|
g_framelist[j] = QH_HLP_QH(&g_periodic_qh_head[i]);
|
|
} else {
|
|
qh = EHCI_ADDR2QH(g_framelist[j]);
|
|
while (1) {
|
|
if (qh == &g_periodic_qh_head[i]) {
|
|
break;
|
|
}
|
|
if (qh->hw.hlp == QH_HLP_END) {
|
|
qh->hw.hlp = QH_HLP_QH(&g_periodic_qh_head[i]);
|
|
break;
|
|
}
|
|
|
|
qh = EHCI_ADDR2QH(qh->hw.hlp);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
usb_ehci_dcache_clean((uintptr_t)g_periodic_qh_head, EHCI_PERIOIDIC_QH_NUM * sizeof(struct ehci_qh_hw));
|
|
usb_ehci_dcache_clean((uintptr_t)g_framelist, CONFIG_USB_EHCI_FRAME_LIST_SIZE * sizeof(uint32_t));
|
|
|
|
usb_hc_low_level_init();
|
|
|
|
EHCI_HCOR->usbcmd |= EHCI_USBCMD_HCRESET;
|
|
while (EHCI_HCOR->usbcmd & EHCI_USBCMD_HCRESET) {
|
|
usb_osal_msleep(1);
|
|
timeout++;
|
|
if (timeout > 100) {
|
|
return -ETIMEDOUT;
|
|
}
|
|
}
|
|
|
|
usb_hc_low_level2_init();
|
|
|
|
EHCI_HCOR->usbintr = 0;
|
|
EHCI_HCOR->usbsts = EHCI_HCOR->usbsts;
|
|
#if CONFIG_USB_EHCI_HCCR_BASE != 0
|
|
USB_LOG_INFO("EHCI HCIVERSION:%04x\r\n", (int)EHCI_HCCR->hciversion);
|
|
USB_LOG_INFO("EHCI HCSPARAMS:%06x\r\n", (int)EHCI_HCCR->hcsparams);
|
|
USB_LOG_INFO("EHCI HCCPARAMS:%04x\r\n", (int)EHCI_HCCR->hccparams);
|
|
#endif
|
|
/* Set the Current Asynchronous List Address. */
|
|
EHCI_HCOR->asynclistaddr = EHCI_PTR2ADDR(&g_async_qh_head);
|
|
/* Set the Periodic Frame List Base Address. */
|
|
EHCI_HCOR->periodiclistbase = EHCI_PTR2ADDR(g_framelist);
|
|
|
|
regval = 0;
|
|
#if CONFIG_USB_EHCI_FRAME_LIST_SIZE == 1024
|
|
regval |= EHCI_USBCMD_FLSIZE_1024;
|
|
#elif CONFIG_USB_EHCI_FRAME_LIST_SIZE == 512
|
|
regval |= EHCI_USBCMD_FLSIZE_512;
|
|
#elif CONFIG_USB_EHCI_FRAME_LIST_SIZE == 256
|
|
regval |= EHCI_USBCMD_FLSIZE_256;
|
|
#else
|
|
#error Unsupported frame size list size
|
|
#endif
|
|
|
|
regval |= EHCI_USBCMD_ITHRE_1MF;
|
|
regval |= EHCI_USBCMD_ASEN;
|
|
regval |= EHCI_USBCMD_PSEN;
|
|
regval |= EHCI_USBCMD_RUN;
|
|
EHCI_HCOR->usbcmd = regval;
|
|
|
|
#ifdef CONFIG_USB_EHCI_CONFIGFLAG
|
|
EHCI_HCOR->configflag = EHCI_CONFIGFLAG;
|
|
#endif
|
|
/* Wait for the EHCI to run (no longer report halted) */
|
|
timeout = 0;
|
|
while (EHCI_HCOR->usbsts & EHCI_USBSTS_HALTED) {
|
|
usb_osal_msleep(1);
|
|
timeout++;
|
|
if (timeout > 100) {
|
|
return -ETIMEDOUT;
|
|
}
|
|
}
|
|
#ifdef CONFIG_USB_EHCI_PORT_POWER
|
|
for (uint8_t port = 0; port < CONFIG_USBHOST_MAX_RHPORTS; port++) {
|
|
regval = EHCI_HCOR->portsc[port];
|
|
regval |= EHCI_PORTSC_PP;
|
|
EHCI_HCOR->portsc[port] = regval;
|
|
}
|
|
#endif
|
|
|
|
/* Enable EHCI interrupts. */
|
|
EHCI_HCOR->usbintr = EHCI_USBIE_INT | EHCI_USBIE_ERR | EHCI_USBIE_PCD | EHCI_USBIE_FATAL | EHCI_USBIE_IAA;
|
|
return 0;
|
|
}
|
|
|
|
uint16_t usbh_get_frame_number(void)
|
|
{
|
|
return (((EHCI_HCOR->frindex & EHCI_FRINDEX_MASK) >> 3) & 0x3ff);
|
|
}
|
|
|
|
int usbh_roothub_control(struct usb_setup_packet *setup, uint8_t *buf)
|
|
{
|
|
uint8_t nports;
|
|
uint8_t port;
|
|
uint32_t temp, status;
|
|
|
|
nports = CONFIG_USBHOST_MAX_RHPORTS;
|
|
|
|
port = setup->wIndex;
|
|
if (setup->bmRequestType & USB_REQUEST_RECIPIENT_DEVICE) {
|
|
switch (setup->bRequest) {
|
|
case HUB_REQUEST_CLEAR_FEATURE:
|
|
switch (setup->wValue) {
|
|
case HUB_FEATURE_HUB_C_LOCALPOWER:
|
|
break;
|
|
case HUB_FEATURE_HUB_C_OVERCURRENT:
|
|
break;
|
|
default:
|
|
return -EPIPE;
|
|
}
|
|
break;
|
|
case HUB_REQUEST_SET_FEATURE:
|
|
switch (setup->wValue) {
|
|
case HUB_FEATURE_HUB_C_LOCALPOWER:
|
|
break;
|
|
case HUB_FEATURE_HUB_C_OVERCURRENT:
|
|
break;
|
|
default:
|
|
return -EPIPE;
|
|
}
|
|
break;
|
|
case HUB_REQUEST_GET_DESCRIPTOR:
|
|
break;
|
|
case HUB_REQUEST_GET_STATUS:
|
|
memset(buf, 0, 4);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
} else if (setup->bmRequestType & USB_REQUEST_RECIPIENT_OTHER) {
|
|
switch (setup->bRequest) {
|
|
case HUB_REQUEST_CLEAR_FEATURE:
|
|
if (!port || port > nports) {
|
|
return -EPIPE;
|
|
}
|
|
|
|
switch (setup->wValue) {
|
|
case HUB_PORT_FEATURE_ENABLE:
|
|
EHCI_HCOR->portsc[port - 1] &= ~EHCI_PORTSC_PE;
|
|
break;
|
|
case HUB_PORT_FEATURE_SUSPEND:
|
|
case HUB_PORT_FEATURE_C_SUSPEND:
|
|
break;
|
|
case HUB_PORT_FEATURE_POWER:
|
|
#ifdef CONFIG_USB_EHCI_PORT_POWER
|
|
EHCI_HCOR->portsc[port - 1] &= ~EHCI_PORTSC_PP;
|
|
#endif
|
|
break;
|
|
case HUB_PORT_FEATURE_C_CONNECTION:
|
|
EHCI_HCOR->portsc[port - 1] |= EHCI_PORTSC_CSC;
|
|
break;
|
|
case HUB_PORT_FEATURE_C_ENABLE:
|
|
EHCI_HCOR->portsc[port - 1] |= EHCI_PORTSC_PEC;
|
|
break;
|
|
case HUB_PORT_FEATURE_C_OVER_CURREN:
|
|
EHCI_HCOR->portsc[port - 1] |= EHCI_PORTSC_OCC;
|
|
break;
|
|
case HUB_PORT_FEATURE_C_RESET:
|
|
break;
|
|
default:
|
|
return -EPIPE;
|
|
}
|
|
break;
|
|
case HUB_REQUEST_SET_FEATURE:
|
|
if (!port || port > nports) {
|
|
return -EPIPE;
|
|
}
|
|
|
|
switch (setup->wValue) {
|
|
case HUB_PORT_FEATURE_SUSPEND:
|
|
break;
|
|
case HUB_PORT_FEATURE_POWER:
|
|
#ifdef CONFIG_USB_EHCI_PORT_POWER
|
|
EHCI_HCOR->portsc[port - 1] |= EHCI_PORTSC_PP;
|
|
#endif
|
|
break;
|
|
case HUB_PORT_FEATURE_RESET:
|
|
usbh_reset_port(port);
|
|
break;
|
|
|
|
default:
|
|
return -EPIPE;
|
|
}
|
|
break;
|
|
case HUB_REQUEST_GET_STATUS:
|
|
if (!port || port > nports) {
|
|
return -EPIPE;
|
|
}
|
|
temp = EHCI_HCOR->portsc[port - 1];
|
|
|
|
status = 0;
|
|
if (temp & EHCI_PORTSC_CSC) {
|
|
status |= (1 << HUB_PORT_FEATURE_C_CONNECTION);
|
|
}
|
|
if (temp & EHCI_PORTSC_PEC) {
|
|
status |= (1 << HUB_PORT_FEATURE_C_ENABLE);
|
|
}
|
|
if (temp & EHCI_PORTSC_OCC) {
|
|
status |= (1 << HUB_PORT_FEATURE_C_OVER_CURREN);
|
|
}
|
|
|
|
if (temp & EHCI_PORTSC_CCS) {
|
|
status |= (1 << HUB_PORT_FEATURE_CONNECTION);
|
|
}
|
|
if (temp & EHCI_PORTSC_PE) {
|
|
status |= (1 << HUB_PORT_FEATURE_ENABLE);
|
|
|
|
if (usbh_get_port_speed(port) == USB_SPEED_LOW) {
|
|
status |= (1 << HUB_PORT_FEATURE_LOWSPEED);
|
|
} else if (usbh_get_port_speed(port) == USB_SPEED_HIGH) {
|
|
status |= (1 << HUB_PORT_FEATURE_HIGHSPEED);
|
|
}
|
|
}
|
|
if (temp & EHCI_PORTSC_SUSPEND) {
|
|
status |= (1 << HUB_PORT_FEATURE_SUSPEND);
|
|
}
|
|
if (temp & EHCI_PORTSC_OCA) {
|
|
status |= (1 << HUB_PORT_FEATURE_OVERCURRENT);
|
|
}
|
|
if (temp & EHCI_PORTSC_RESET) {
|
|
status |= (1 << HUB_PORT_FEATURE_RESET);
|
|
}
|
|
if (temp & EHCI_PORTSC_PP) {
|
|
status |= (1 << HUB_PORT_FEATURE_POWER);
|
|
}
|
|
memcpy(buf, &status, 4);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int usbh_ep_pipe_reconfigure(usbh_pipe_t pipe, uint8_t dev_addr, uint8_t ep_mps, uint8_t mult)
|
|
{
|
|
struct ehci_pipe *ppipe = (struct ehci_pipe *)pipe;
|
|
|
|
ppipe->dev_addr = dev_addr;
|
|
ppipe->ep_mps = ep_mps;
|
|
ppipe->mult = mult;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int usbh_pipe_alloc(usbh_pipe_t *pipe, const struct usbh_endpoint_cfg *ep_cfg)
|
|
{
|
|
struct ehci_pipe *ppipe;
|
|
usb_osal_sem_t waitsem;
|
|
|
|
ppipe = ehci_pipe_alloc();
|
|
if (ppipe == NULL) {
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/* store variables */
|
|
waitsem = ppipe->waitsem;
|
|
|
|
memset(ppipe, 0, sizeof(struct ehci_pipe));
|
|
|
|
ppipe->ep_addr = ep_cfg->ep_addr;
|
|
ppipe->ep_type = ep_cfg->ep_type;
|
|
ppipe->ep_mps = ep_cfg->ep_mps;
|
|
ppipe->ep_interval = ep_cfg->ep_interval;
|
|
ppipe->mult = ep_cfg->mult;
|
|
ppipe->speed = ep_cfg->hport->speed;
|
|
ppipe->dev_addr = ep_cfg->hport->dev_addr;
|
|
ppipe->hport = ep_cfg->hport;
|
|
|
|
#ifdef CONFIG_USB_EHCI_ISO
|
|
if ((ppipe->speed == USB_SPEED_HIGH) && (ppipe->ep_type == USB_ENDPOINT_TYPE_ISOCHRONOUS)) {
|
|
if (ep_cfg->ep_interval == 0x01) { /* transfer interval 1 mf */
|
|
ppipe->mf_unmask = 0xff;
|
|
ppipe->mf_valid = 8;
|
|
} else if (ep_cfg->ep_interval == 0x02) { /* transfer interval 2 mf */
|
|
ppipe->mf_unmask = 0x55;
|
|
ppipe->mf_valid = 4;
|
|
} else if (ep_cfg->ep_interval == 0x03) { /* transfer interval 4 mf */
|
|
ppipe->mf_unmask = 0x44;
|
|
ppipe->mf_valid = 2;
|
|
} else if (ep_cfg->ep_interval == 0x04) { /* transfer interval 8 mf */
|
|
ppipe->mf_unmask = 0x01;
|
|
ppipe->mf_valid = 1;
|
|
}
|
|
}
|
|
#endif
|
|
/* restore variable */
|
|
ppipe->inuse = true;
|
|
ppipe->waitsem = waitsem;
|
|
|
|
*pipe = (usbh_pipe_t)ppipe;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int usbh_pipe_free(usbh_pipe_t pipe)
|
|
{
|
|
struct usbh_urb *urb;
|
|
size_t flags;
|
|
|
|
struct ehci_pipe *ppipe = (struct ehci_pipe *)pipe;
|
|
|
|
if (!ppipe) {
|
|
return -EINVAL;
|
|
}
|
|
|
|
urb = ppipe->urb;
|
|
|
|
if (urb) {
|
|
usbh_kill_urb(urb);
|
|
}
|
|
|
|
flags = usb_osal_enter_critical_section();
|
|
ehci_pipe_free(ppipe);
|
|
usb_osal_leave_critical_section(flags);
|
|
return 0;
|
|
}
|
|
|
|
int usbh_submit_urb(struct usbh_urb *urb)
|
|
{
|
|
struct ehci_pipe *pipe;
|
|
struct ehci_qh_hw *qh = NULL;
|
|
size_t flags;
|
|
int ret = 0;
|
|
|
|
if (!urb) {
|
|
return -EINVAL;
|
|
}
|
|
|
|
pipe = urb->pipe;
|
|
|
|
if (!pipe) {
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (!pipe->hport->connected) {
|
|
return -ENODEV;
|
|
}
|
|
|
|
if (pipe->urb && (pipe->ep_type != USB_ENDPOINT_TYPE_ISOCHRONOUS)) {
|
|
return -EBUSY;
|
|
}
|
|
|
|
flags = usb_osal_enter_critical_section();
|
|
|
|
pipe->waiter = false;
|
|
pipe->xfrd = 0;
|
|
pipe->qh = NULL;
|
|
pipe->urb = urb;
|
|
urb->errorcode = -EBUSY;
|
|
urb->actual_length = 0;
|
|
|
|
if (urb->timeout > 0) {
|
|
pipe->waiter = true;
|
|
}
|
|
usb_osal_leave_critical_section(flags);
|
|
switch (pipe->ep_type) {
|
|
case USB_ENDPOINT_TYPE_CONTROL:
|
|
qh = ehci_control_pipe_init(pipe, urb->setup, urb->transfer_buffer, urb->transfer_buffer_length);
|
|
if (qh == NULL) {
|
|
return -ENOMEM;
|
|
}
|
|
break;
|
|
case USB_ENDPOINT_TYPE_BULK:
|
|
qh = ehci_bulk_pipe_init(pipe, urb->transfer_buffer, urb->transfer_buffer_length);
|
|
if (qh == NULL) {
|
|
return -ENOMEM;
|
|
}
|
|
break;
|
|
case USB_ENDPOINT_TYPE_INTERRUPT:
|
|
qh = ehci_intr_pipe_init(pipe, urb->transfer_buffer, urb->transfer_buffer_length);
|
|
if (qh == NULL) {
|
|
return -ENOMEM;
|
|
}
|
|
break;
|
|
case USB_ENDPOINT_TYPE_ISOCHRONOUS:
|
|
#ifdef CONFIG_USB_EHCI_ISO
|
|
ehci_iso_pipe_init(pipe, urb);
|
|
#endif
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if (urb->timeout > 0) {
|
|
/* wait until timeout or sem give */
|
|
ret = usb_osal_sem_take(pipe->waitsem, urb->timeout);
|
|
if (ret < 0) {
|
|
goto errout_timeout;
|
|
}
|
|
ret = urb->errorcode;
|
|
}
|
|
return ret;
|
|
errout_timeout:
|
|
/* Timeout will run here */
|
|
pipe->waiter = false;
|
|
usbh_kill_urb(urb);
|
|
return ret;
|
|
}
|
|
|
|
int usbh_kill_urb(struct usbh_urb *urb)
|
|
{
|
|
struct ehci_pipe *pipe;
|
|
struct ehci_qh_hw *qh = NULL;
|
|
|
|
size_t flags;
|
|
|
|
if (!urb) {
|
|
return -EINVAL;
|
|
}
|
|
|
|
pipe = urb->pipe;
|
|
|
|
if (!pipe) {
|
|
return -EINVAL;
|
|
}
|
|
|
|
flags = usb_osal_enter_critical_section();
|
|
|
|
EHCI_HCOR->usbcmd &= ~(EHCI_USBCMD_PSEN | EHCI_USBCMD_ASEN);
|
|
|
|
if ((pipe->ep_type == USB_ENDPOINT_TYPE_CONTROL) || (pipe->ep_type == USB_ENDPOINT_TYPE_BULK)) {
|
|
qh = EHCI_ADDR2QH(g_async_qh_head.hw.hlp);
|
|
while ((qh != &g_async_qh_head) && qh) {
|
|
if (qh == pipe->qh) {
|
|
ehci_kill_qh(&g_async_qh_head, qh);
|
|
}
|
|
qh = EHCI_ADDR2QH(qh->hw.hlp);
|
|
}
|
|
} else if (pipe->ep_type == USB_ENDPOINT_TYPE_INTERRUPT) {
|
|
qh = EHCI_ADDR2QH(g_periodic_qh_head[EHCI_PERIOIDIC_QH_NUM - 1].hw.hlp);
|
|
while (qh) {
|
|
if (qh == pipe->qh) {
|
|
if (pipe->speed == USB_SPEED_HIGH) {
|
|
ehci_kill_qh(ehci_get_periodic_qhead(pipe->ep_interval), qh);
|
|
} else {
|
|
ehci_kill_qh(ehci_get_periodic_qhead(pipe->ep_interval * 8), qh);
|
|
}
|
|
}
|
|
qh = EHCI_ADDR2QH(qh->hw.hlp);
|
|
}
|
|
} else {
|
|
#ifdef CONFIG_USB_EHCI_ISO
|
|
ehci_remove_itd_urb(urb);
|
|
#endif
|
|
}
|
|
|
|
EHCI_HCOR->usbcmd |= (EHCI_USBCMD_PSEN | EHCI_USBCMD_ASEN);
|
|
|
|
pipe->qh = NULL;
|
|
pipe->urb = NULL;
|
|
|
|
if (pipe->waiter) {
|
|
pipe->waiter = false;
|
|
urb->errorcode = -ESHUTDOWN;
|
|
//usb_osal_sem_give(pipe->waitsem);
|
|
}
|
|
|
|
usb_osal_leave_critical_section(flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ehci_scan_async_list(void)
|
|
{
|
|
struct ehci_qh_hw *qh;
|
|
struct ehci_pipe *pipe;
|
|
|
|
qh = EHCI_ADDR2QH(g_async_qh_head.hw.hlp);
|
|
while ((qh != &g_async_qh_head) && qh) {
|
|
pipe = qh->pipe;
|
|
if (pipe) {
|
|
ehci_check_qh(&g_async_qh_head, qh, pipe);
|
|
}
|
|
qh = EHCI_ADDR2QH(qh->hw.hlp);
|
|
}
|
|
}
|
|
|
|
static void ehci_scan_periodic_list(void)
|
|
{
|
|
struct ehci_qh_hw *qh;
|
|
struct ehci_pipe *pipe;
|
|
|
|
qh = EHCI_ADDR2QH(g_periodic_qh_head[EHCI_PERIOIDIC_QH_NUM - 1].hw.hlp);
|
|
while (qh) {
|
|
pipe = qh->pipe;
|
|
if (pipe) {
|
|
if (pipe->speed == USB_SPEED_HIGH) {
|
|
ehci_check_qh(ehci_get_periodic_qhead(pipe->ep_interval), qh, pipe);
|
|
} else {
|
|
ehci_check_qh(ehci_get_periodic_qhead(pipe->ep_interval * 8), qh, pipe);
|
|
}
|
|
}
|
|
qh = EHCI_ADDR2QH(qh->hw.hlp);
|
|
}
|
|
}
|
|
|
|
void USBH_IRQHandler(void)
|
|
{
|
|
uint32_t usbsts;
|
|
|
|
usbsts = EHCI_HCOR->usbsts & EHCI_HCOR->usbintr;
|
|
EHCI_HCOR->usbsts = usbsts;
|
|
|
|
if (usbsts & EHCI_USBSTS_INT) {
|
|
ehci_scan_async_list();
|
|
ehci_scan_periodic_list();
|
|
#ifdef CONFIG_USB_EHCI_ISO
|
|
ehci_scan_isochronous_list();
|
|
#endif
|
|
}
|
|
|
|
if (usbsts & EHCI_USBSTS_ERR) {
|
|
ehci_scan_async_list();
|
|
ehci_scan_periodic_list();
|
|
#ifdef CONFIG_USB_EHCI_ISO
|
|
ehci_scan_isochronous_list();
|
|
#endif
|
|
}
|
|
|
|
if (usbsts & EHCI_USBSTS_PCD) {
|
|
for (int port = 0; port < CONFIG_USBHOST_MAX_RHPORTS; port++) {
|
|
uint32_t portsc = EHCI_HCOR->portsc[port];
|
|
|
|
if (portsc & EHCI_PORTSC_CSC) {
|
|
if ((portsc & EHCI_PORTSC_CCS) == EHCI_PORTSC_CCS) {
|
|
} else {
|
|
for (uint8_t index = 0; index < CONFIG_USB_EHCI_QH_NUM; index++) {
|
|
g_ehci_hcd.ehci_qh_used[index] = false;
|
|
}
|
|
for (uint8_t index = 0; index < CONFIG_USB_EHCI_QTD_NUM; index++) {
|
|
g_ehci_hcd.ehci_qtd_used[index] = false;
|
|
}
|
|
for (uint8_t index = 0; index < CONFIG_USB_EHCI_ITD_NUM; index++) {
|
|
g_ehci_hcd.ehci_itd_used[index] = false;
|
|
}
|
|
}
|
|
usbh_roothub_thread_wakeup(port + 1);
|
|
}
|
|
}
|
|
}
|
|
|
|
if (usbsts & EHCI_USBSTS_IAA) {
|
|
}
|
|
|
|
if (usbsts & EHCI_USBSTS_FATAL) {
|
|
}
|
|
}
|