mirror of
https://gitee.com/Vancouver2017/luban-lite-t3e-pro.git
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276 lines
6.0 KiB
C
276 lines
6.0 KiB
C
/*
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* Copyright (c) 2023-2024, ArtInChip Technology Co., Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <aic_core.h>
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#include <aic_hal.h>
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#include <aic_hal_rgb.h>
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#include "drv_fb.h"
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struct aic_rgb_comp
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{
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void *regs;
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struct aic_panel *panel;
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u64 sclk_rate;
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u64 pll_disp_rate;
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};
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static struct aic_rgb_comp *g_aic_rgb_comp;
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#ifdef AIC_DISP_PQ_TOOL
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AIC_PQ_TOOL_PINMUX_CONFIG(disp_pinmux_config);
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AIC_PQ_TOOL_SET_DISP_PINMUX_FOPS(disp_pinmux_config)
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#endif
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static struct aic_rgb_comp *aic_rgb_request_drvdata(void)
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{
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return g_aic_rgb_comp;
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}
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static void aic_rgb_release_drvdata(void)
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{
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}
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#ifdef AIC_DISP_RGB_DRV_V12
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struct rgb_bits_valid {
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u32 mode;
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u32 format;
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u32 bits_valid;
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};
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static const struct rgb_bits_valid rgb_valid[] = {
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{
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.mode = PRGB,
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.format = PRGB_24BIT,
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.bits_valid = 0x777,
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},
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{
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.mode = PRGB,
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.format = PRGB_18BIT_LD,
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.bits_valid = 0x555,
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},
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{
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.mode = PRGB,
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.format = PRGB_18BIT_HD,
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.bits_valid = 0x555,
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},
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{
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.mode = PRGB,
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.format = PRGB_16BIT_LD,
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.bits_valid = 0x454,
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},
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{
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.mode = PRGB,
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.format = PRGB_16BIT_HD,
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.bits_valid = 0x454,
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},
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{
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.mode = SRGB,
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.format = SRGB_8BIT,
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.bits_valid = 0x777,
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},
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{
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.mode = SRGB,
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.format = SRGB_6BIT,
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.bits_valid = 0x555,
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},
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};
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static int aic_rgb_data_valid(u32 mode, u32 format, u32 *bits_valid)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(rgb_valid); ++i)
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if (rgb_valid[i].mode == mode && rgb_valid[i].format == format) {
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*bits_valid = rgb_valid[i].bits_valid;
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return 0;
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}
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return -EINVAL;
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}
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#endif
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static int aic_rgb_clk_enable(void)
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{
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struct aic_rgb_comp *comp = aic_rgb_request_drvdata();
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u32 pixclk = comp->panel->timings->pixelclock;
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hal_clk_set_freq(CLK_PLL_FRA2, comp->pll_disp_rate);
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hal_clk_set_rate(CLK_SCLK, comp->sclk_rate, comp->pll_disp_rate);
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hal_clk_set_rate(CLK_PIX, pixclk, comp->sclk_rate);
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hal_clk_enable(CLK_PLL_FRA2);
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hal_clk_enable(CLK_SCLK);
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hal_clk_enable(CLK_RGB);
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hal_reset_deassert(RESET_RGB);
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aic_rgb_release_drvdata();
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return 0;
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}
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static int aic_rgb_clk_disable(void)
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{
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hal_reset_assert(RESET_RGB);
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hal_clk_disable(CLK_RGB);
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hal_clk_disable(CLK_SCLK);
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return 0;
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}
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static void aic_rgb_swap(void)
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{
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struct aic_rgb_comp *comp = aic_rgb_request_drvdata();
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struct panel_rgb *rgb = comp->panel->rgb;
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u32 bits_valid = 0;
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if (rgb->data_mirror) {
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reg_set_bits(comp->regs + RGB_DATA_SEQ_SEL,
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RGB_DATA_OUT_SEL_MASK, RGB_DATA_OUT_SEL(7));
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#ifdef AIC_DISP_RGB_DRV_V12
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if (aic_rgb_data_valid(rgb->mode, rgb->format, &bits_valid))
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pr_err("rgb data mirror failed, disable data mirror\n");
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#endif
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reg_set_bits(comp->regs + RGB_DATA_SEQ_SEL,
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RGB_DATA_OUT_SEL_VALID_MASK, RGB_DATA_OUT_SEL_VALID(bits_valid));
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}
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if (rgb->data_order)
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reg_write(comp->regs + RGB_DATA_SEL, rgb->data_order);
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if (rgb->clock_phase)
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reg_set_bits(comp->regs + RGB_CLK_CTL,
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CKO_PHASE_SEL_MASK,
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CKO_PHASE_SEL(rgb->clock_phase));
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aic_rgb_release_drvdata();
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}
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static int aic_rgb_enable(void)
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{
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struct aic_rgb_comp *comp = aic_rgb_request_drvdata();
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struct panel_rgb *rgb = comp->panel->rgb;
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reg_set_bits(comp->regs + RGB_LCD_CTL,
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RGB_LCD_CTL_MODE_MASK,
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RGB_LCD_CTL_MODE(rgb->mode));
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switch (rgb->mode) {
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case PRGB:
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reg_set_bits(comp->regs + RGB_LCD_CTL,
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RGB_LCD_CTL_PRGB_MODE_MASK,
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RGB_LCD_CTL_PRGB_MODE(rgb->format));
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aic_rgb_swap();
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break;
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case SRGB:
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if (rgb->format)
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reg_set_bit(comp->regs + RGB_LCD_CTL,
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RGB_LCD_CTL_SRGB_MODE);
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aic_rgb_swap();
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break;
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default:
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pr_err("Invalid mode %d\n", rgb->mode);
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break;
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}
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reg_set_bit(comp->regs + RGB_LCD_CTL, RGB_LCD_CTL_EN);
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aic_rgb_release_drvdata();
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return 0;
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}
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static int aic_rgb_disable(void)
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{
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struct aic_rgb_comp *comp = aic_rgb_request_drvdata();
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reg_clr_bit(comp->regs + RGB_LCD_CTL, RGB_LCD_CTL_EN);
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aic_rgb_release_drvdata();
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return 0;
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}
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static int aic_rgb_attach_panel(struct aic_panel *panel)
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{
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struct aic_rgb_comp *comp = aic_rgb_request_drvdata();
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u32 pixclk = panel->timings->pixelclock;
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struct panel_rgb *rgb = panel->rgb;
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u64 pll_disp_rate = 0;
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int i = 0;
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comp->panel = panel;
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if (rgb->mode == PRGB)
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#ifdef AIC_DISP_RGB_DRV_V10
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comp->sclk_rate = pixclk * 4;
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#else
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comp->sclk_rate = pixclk * 2;
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#endif
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else if (rgb->mode == SRGB)
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#ifdef AIC_DISP_RGB_DRV_V10
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comp->sclk_rate = pixclk * 12;
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#else
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comp->sclk_rate = pixclk * 6;
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#endif
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pll_disp_rate = comp->sclk_rate;
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while (pll_disp_rate < PLL_DISP_FREQ_MIN)
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{
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pll_disp_rate = comp->sclk_rate * (2 << i);
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i++;
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}
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comp->pll_disp_rate = pll_disp_rate;
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aic_rgb_release_drvdata();
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return 0;
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}
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struct di_funcs aic_rgb_func = {
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.clk_enable = aic_rgb_clk_enable,
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.clk_disable = aic_rgb_clk_disable,
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.enable = aic_rgb_enable,
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.disable = aic_rgb_disable,
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.attach_panel = aic_rgb_attach_panel,
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};
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static int aic_rgb_probe(void)
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{
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struct aic_rgb_comp *comp;
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comp = aicos_malloc(0, sizeof(*comp));
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if (!comp)
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{
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pr_err("alloc rgb comp failed\n");
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return -ENOMEM;
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}
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memset(comp, 0, sizeof(*comp));
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comp->regs = (void *)LCD_BASE;
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g_aic_rgb_comp = comp;
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#ifdef AIC_DISP_PQ_TOOL
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AIC_PQ_SET_DSIP_PINMUX;
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#endif
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return 0;
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}
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static void aic_rgb_remove(void)
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{
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}
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struct platform_driver artinchip_rgb_driver = {
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.name = "artinchip-rgb",
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.component_type = AIC_RGB_COM,
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.probe = aic_rgb_probe,
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.remove = aic_rgb_remove,
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.di_funcs = &aic_rgb_func,
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};
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