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39 lines
587 B
C
39 lines
587 B
C
/*
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* Copyright (c) 2023, ArtInChip Technology Co., Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Authors: Mingfeng.Li <mingfeng.li@artinchip.com>
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*/
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#ifndef __BL_XSPIPSRAM_H_
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#define __BL_XSPIPSRAM_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <hal_xspi.h>
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struct aic_xspi
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{
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char *name;
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u32 idx;
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u32 clk_id;
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u32 clk_in_hz;
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u32 dma_port_id;
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u32 irq_num;
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hal_xspi_handle handle;
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bool inited;
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};
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#define PSRAM_INIT_OK 0
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#define PSRAM_INIT_FAILED 1
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u32 aic_xspi_psram_init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __BL_XSPIPSRAM_H_ */
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