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https://gitee.com/Vancouver2017/luban-lite-t3e-pro.git
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99 lines
2.9 KiB
C
99 lines
2.9 KiB
C
/*
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* Copyright (C) 2020-2022 ArtInChip Technology Co., Ltd.
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* Authors: matteo <duanmt@artinchip.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _RGB_REG_H_
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#define _RGB_REG_H_
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#include <aic_common.h>
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#include <aic_io.h>
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#include "aic_hal_disp_reg_util.h"
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enum aic_rgb_cko_phase_sel {
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CKO_PHASE_SEL_0 = 0x0,
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CKO_PHASE_SEL_90 = 0x1,
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CKO_PHASE_SEL_180 = 0x2,
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CKO_PHASE_SEL_270 = 0x3
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};
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/* RGB mode */
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#define PRGB 0x0
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#define SRGB 0x1
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/*
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* PRGB format
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*
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* "HD" or "LD" specifies which of the 24 pins will be discarded: "HD" means
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* that the highest 6/8 pins of the 24 will be discarded, "LD" means that the
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* lowest 6/8 pins will be discarded.
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*/
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#define PRGB_24BIT 0x0
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#define PRGB_18BIT_LD 0x1
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#define PRGB_18BIT_HD 0x2
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#define PRGB_16BIT_LD 0x3
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#define PRGB_16BIT_HD 0x4
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/* SRGB format */
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#define SRGB_8BIT 0x0
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#define SRGB_6BIT 0x1
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/* RGB interface pixel clock output phase */
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#define DEGREE_0 0x0
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#define DEGREE_90 0x1
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#define DEGREE_180 0x2
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#define DEGREE_270 0x3
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/* RGB interface output data sequence */
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#define RGB 0x02100210
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#define RBG 0x02010201
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#define BGR 0x00120012
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#define BRG 0x00210021
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#define GRB 0x01200120
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#define GBR 0x01020102
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#define RGB_LCD_CTL_MODE_MASK GENMASK(5, 4)
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#define RGB_LCD_CTL_MODE(x) (((x)&0x3) << 4)
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#define RGB_LCD_CTL_EN BIT(0)
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#define RGB_CLK_CTL_CKO_PHASE_MASK GENMASK(1, 0)
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#define RGB_CLK_CTL_CKO_PHASE(x) (((x)&0x3) << 0)
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#define RGB_LCD_CTL_PRGB_MODE_MASK GENMASK(10, 8)
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#define RGB_LCD_CTL_PRGB_MODE(x) (((x)&0x7) << 8)
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#define RGB_LCD_CTL_SRGB_MODE BIT(12)
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#define RGB_DATA_SEL_EVEN_DP2316_MASK GENMASK(25, 24)
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#define RGB_DATA_SEL_EVEN_DP2316(x) (((x)&0x3) << 24)
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#define RGB_DATA_SEL_EVEN_DP1508_MASK GENMASK(21, 20)
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#define RGB_DATA_SEL_EVEN_DP1508(x) (((x)&0x3) << 20)
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#define RGB_DATA_SEL_EVEN_DP0700_MASK GENMASK(17, 16)
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#define RGB_DATA_SEL_EVEN_DP0700(x) (((x)&0x3) << 16)
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#define RGB_DATA_SEL_OOD_DP2316_MASK GENMASK(9, 8)
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#define RGB_DATA_SEL_OOD_DP2316(x) (((x)&0x3) << 8)
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#define RGB_DATA_SEL_OOD_DP1508_MASK GENMASK(5, 4)
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#define RGB_DATA_SEL_OOD_DP1508(x) (((x)&0x3) << 4)
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#define RGB_DATA_SEL_OOD_DP0700_MASK GENMASK(1, 0)
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#define RGB_DATA_SEL_OOD_DP0700(x) (((x)&0x3) << 0)
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#define RGB_DATA_OUT_SEL_MASK GENMASK(2, 0)
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#define RGB_DATA_OUT_SEL(x) (((x) & 0x7) << 0)
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#define RGB_DATA_OUT_SEL_VALID_MASK GENMASK(14, 4)
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#define RGB_DATA_OUT_SEL_VALID(x) (((x) & 0xFFF) << 4)
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#define CKO_PHASE_SEL_MASK GENMASK(1, 0)
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#define CKO_PHASE_SEL(x) (((x) & 0x3) << 0)
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#define RGB_LCD_CTL 0x00
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#define RGB_CLK_CTL 0x10
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#define RGB_DATA_SEL 0x20
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#define RGB_OOD_DATA 0x24
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#define RGB_EVEN_DATA 0x28
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#define RGB_DATA_SEQ_SEL 0x30
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#define RGB_VERSION 0xFC
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#endif // end of _RGB_REG_H_
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