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78 lines
1.7 KiB
C
78 lines
1.7 KiB
C
/*
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* Copyright (c) 2022, Artinchip Technology Co., Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __AIC_RESET_ID_H__
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#define __AIC_RESET_ID_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define RESET_DMA 0
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#define RESET_CE 1
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#define RESET_USBD 2
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#define RESET_USBH0 3
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#define RESET_USBH1 4
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#define RESET_USBPHY0 5
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#define RESET_USBPHY1 6
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#define RESET_GMAC0 7
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#define RESET_GMAC1 8
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#define RESET_QSPI0 9
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#define RESET_QSPI1 10
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#define RESET_QSPI2 11
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#define RESET_QSPI3 12
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#define RESET_SDMMC0 13
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#define RESET_SDMMC1 14
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#define RESET_SDMMC2 15
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#define RESET_SYSCFG 16
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#define RESET_RTC 17
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#define RESET_SPIENC 18
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#define RESET_I2S0 19
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#define RESET_I2S1 20
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#define RESET_CODEC 21
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#define RESET_RGB 22
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#define RESET_LVDS 23
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#define RESET_MIPIDSI 24
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#define RESET_DE 25
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#define RESET_GE 26
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#define RESET_VE 27
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#define RESET_WDT 28
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#define RESET_SID 29
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#define RESET_GTC 30
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#define RESET_GPIO 31
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#define RESET_UART0 32
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#define RESET_UART1 33
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#define RESET_UART2 34
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#define RESET_UART3 35
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#define RESET_UART4 36
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#define RESET_UART5 37
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#define RESET_UART6 38
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#define RESET_UART7 39
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#define RESET_I2C0 40
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#define RESET_I2C1 41
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#define RESET_I2C2 42
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#define RESET_I2C3 43
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#define RESET_CAN0 44
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#define RESET_CAN1 45
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#define RESET_PWM 46
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#define RESET_ADCIM 47
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#define RESET_GPAI 48
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#define RESET_RTP 49
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#define RESET_TSEN 50
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#define RESET_CIR 51
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#define RESET_DVP 52
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#define RESET_MTOP 53
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#define RESET_PBUS 54
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#define RESET_PWMCS 55
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#define RESET_PSADC 56
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#define RESET_NUMBER 57
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#ifdef __cplusplus
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}
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#endif
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#endif /* __AIC_RESET_ID_H__ */
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