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https://gitee.com/Vancouver2017/luban-lite-t3e-pro.git
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128 lines
3.5 KiB
C
128 lines
3.5 KiB
C
/*
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* Copyright (c) 2023-2024, ArtInChip Technology Co., Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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* Authors: dwj <weijie.ding@artinchip.com>
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*/
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#include <rtthread.h>
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#include <stdio.h>
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#include <hal_i2s.h>
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#include <hal_dma.h>
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#define I2S_PERIOD_COUNT 2
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#define I2S_BUFFER_SIZE 128
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#define I2S_PERIOD_SIZE (I2S_BUFFER_SIZE / I2S_PERIOD_COUNT)
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#define MAX_COUNTER_VALUE 200
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#ifdef AIC_USING_I2S0
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#define I2S_IDX 0
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#elif defined(AIC_USING_I2S1)
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#define I2S_IDX 1
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#endif
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aic_i2s_ctrl i2s_ctrl;
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uint8_t i2s_rx_in[I2S_BUFFER_SIZE] __attribute__((aligned(64)));
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uint8_t i2s_tx_out[I2S_BUFFER_SIZE] __attribute__((aligned(64)));
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volatile int val = 0;
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volatile uint32_t tx_pos = 0;
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volatile uint8_t rx_pos = 0;
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static void drv_i2s_callback(aic_i2s_ctrl *pi2s, void *arg)
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{
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int i;
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unsigned long event = (unsigned long)arg;
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switch (event)
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{
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case I2S_TX_PERIOD_INT:
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for (i = 0; i < I2S_PERIOD_SIZE; i++) {
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i2s_tx_out[tx_pos++] = val++;
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tx_pos %= I2S_BUFFER_SIZE;
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val %= MAX_COUNTER_VALUE;
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}
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aicos_dcache_clean_range((void *)i2s_tx_out, I2S_BUFFER_SIZE);
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break;
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case I2S_RX_PERIOD_INT:
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aicos_dcache_invalid_range((void *)i2s_rx_in, I2S_BUFFER_SIZE);
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for (i = 0; i < I2S_PERIOD_SIZE; i++) {
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rt_kprintf("%u: %u\n", rx_pos, i2s_rx_in[rx_pos]);
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rx_pos++;
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}
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rx_pos %= I2S_BUFFER_SIZE;
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break;
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default:
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hal_log_err("unknown event\n");
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break;
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}
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}
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void i2s_set_format(aic_i2s_ctrl *pi2s, i2s_format_t *format)
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{
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format->mode = I2S_MODE_MASTER;
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format->protocol = I2S_PROTOCOL_I2S;
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format->polarity = I2S_LEFT_POLARITY_LOW;
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format->rate = I2S_SAMPLE_RATE_48000;
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format->width = I2S_SAMPLE_WIDTH_32BIT;
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format->slot_width = I2S_SAMPLE_WIDTH_32BIT;
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format->channel = I2S_TDM_CHANNEL_2;
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format->sclk_nfs = 64;
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format->mclk_nfs = 256;
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format->stream = I2S_STREAM_PLAYBACK;
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hal_i2s_set_format(pi2s, format);
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format->stream = I2S_STREAM_RECORD;
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hal_i2s_set_format(pi2s, format);
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}
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static int test_i2s_loopback(int argc, char *argv[])
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{
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int i;
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i2s_format_t format;
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i2s_ctrl.rx_info.buf_info.buf = (void *)i2s_rx_in;
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i2s_ctrl.rx_info.buf_info.buf_len = I2S_BUFFER_SIZE;
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i2s_ctrl.rx_info.buf_info.period_len = I2S_BUFFER_SIZE / I2S_PERIOD_COUNT;
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i2s_ctrl.tx_info.buf_info.buf = (void *)i2s_tx_out;
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i2s_ctrl.tx_info.buf_info.buf_len = I2S_BUFFER_SIZE;
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i2s_ctrl.tx_info.buf_info.period_len = I2S_BUFFER_SIZE / I2S_PERIOD_COUNT;
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/*
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* TX use dual buffer mode, ecah buffer 64bytes.
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* Fill the first buffer.
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*/
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for (tx_pos = 0; tx_pos < I2S_PERIOD_SIZE; tx_pos++) {
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i2s_tx_out[tx_pos] = val++;
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}
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/*
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* RX use dual buffer mode, ecah buffer 64bytes.
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* Clear dual buffer data to 0.
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*/
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for (i = 0; i < I2S_BUFFER_SIZE; i++)
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i2s_rx_in[i] = 0;
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hal_i2s_init(&i2s_ctrl, I2S_IDX);
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/* Enable I2S loopback */
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hal_i2s_enable_loopback(&i2s_ctrl);
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hal_i2s_attach_callback(&i2s_ctrl, drv_i2s_callback, NULL);
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i2s_set_format(&i2s_ctrl, &format);
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hal_dma_init();
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aicos_request_irq(DMA_IRQn, hal_dma_irq, 0, NULL, NULL);
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/* Start capture */
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hal_i2s_record_start(&i2s_ctrl, &format);
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/* Start playback */
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hal_i2s_playback_start(&i2s_ctrl, &format);
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while (1)
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{
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}
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return RT_EOK;
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}
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MSH_CMD_EXPORT_ALIAS(test_i2s_loopback, test_i2s_loopback, test i2s loopback);
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