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113 lines
2.1 KiB
C
113 lines
2.1 KiB
C
/*
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* Copyright (c) 2023, Artinchip Technology Co., Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _DISP_CONF_H_
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#define _DISP_CONF_H_
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/**
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* LVDS options
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*/
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/* lvds sync mode enable */
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#define AIC_LVDS_SYNC_MODE_EN 1
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/* lvds link swap enable, swap lvds link0 and link1 */
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#define AIC_LVDS_LINK_SWAP_EN 0
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/**
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* lvds channel output order
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*
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* works on both link0 and link1 (if exists)
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*
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* default D3 CK D2 D1 D0
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* 4 3 2 1 0
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*/
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#define AIC_LVDS_LINES 0x43210
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/**
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* lvds channel polarities, works on both link0 and link1 (if exists)
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*/
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#define AIC_LVDS_POL 0x0
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/**
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* lvds channel phy config, works on both link0 and link1 (if exists)
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*/
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#define AIC_LVDS_PHY 0xFA
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/**
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* MIPI-DSI options
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*/
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/* data line assignments */
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#define LANE_ASSIGNMENTS 0x3210;
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/* data line polarities */
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#define LANE_POLARITIES 0b0000;
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/* data clk inverse */
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#define CLK_INVERSE 0
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/* virtual channel id */
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#define VIRTUAL_CHANNEL 0
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/* mipi-dsi lp rate, range [10M, 20M], default 10M */
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#define MIPI_DSI_LP_RATE (10 * 1000 * 1000)
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/* mipi-dsi dcs get display id from screen when panel enable */
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#define DCS_GET_DISPLAY_ID 0
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/**
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* FB ROTATION options
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*/
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/* drawing buf for GUI, range [1, 2] */
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#define AIC_FB_DRAW_BUF_NUM 2
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/**
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* Display Engine options
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*/
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/**
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* Display Engine Mode
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*
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* Continue mode, ignore the TE signal of LCD and the timing signal
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* of display engine is continuous.
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*
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* Single frame mode, the timing signal of display engine needs to be
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* manually updated.
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*
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* Auto mode, need a TE pulse width. The display engine automatically
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* updates timing signal after obtained a TE signal from LCD.
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*
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* If unsure, say continuous mode.
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*/
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#define CONTINUE 0
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#define SINGLE 1
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#define AUTO 2
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#define DE_MODE CONTINUE
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/**
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* AUTO mode options
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*/
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#if ( DE_MODE == 2 )
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# define DE_AUTO_MODE 1
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#endif
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#if DE_AUTO_MODE
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/**
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* TE PIN
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*
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* D12x, just support { "PC.6", "PD.2", "PF.15" }
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* D13x, just support { "PC.6", "PA.1" }
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*/
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# define TE_PIN "PC.6"
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# define TE_PULSE_WIDTH 2
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#endif
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#endif /* _DISP_CONF_H_ */
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