mirror of
https://gitee.com/Vancouver2017/luban-lite-t3e-pro.git
synced 2025-12-14 18:38:55 +00:00
190 lines
4.0 KiB
ArmAsm
190 lines
4.0 KiB
ArmAsm
/*
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* Copyright (c) 2022, Artinchip Technology Co., Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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/*
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******************************************************************************
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d12x Memory Layout
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******************************************************************************
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SRAM 32K
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0x30040000+----------+
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| VE |
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+----------+
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| SW |
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0x30047FFF+----------+
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PSRAM 4M/8M
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0x40000000+----------+
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| DE/GE/VE |
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+----------+
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| SW |
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0x403FFFFF+----------+
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/0x407FFFFF| |
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| FPGA Ext |
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| PSRAM |
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| 64M-psram|
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| size |
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0x43FFFFFF+----------+
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*/
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#include "rtconfig.h"
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MEMORY
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{
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PSRAM_BOOT_SW : ORIGIN = (AIC_BOOTLOADER_TEXT_BASE), LENGTH = AIC_BOOTLOADER_TEXT_SIZE
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}
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PROVIDE (__min_heap_size = 0x200);
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PROVIDE (__heap_start = AIC_BOOTLOADER_HEAP_BASE);
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PROVIDE (__heap_end = AIC_BOOTLOADER_HEAP_BASE + AIC_BOOTLOADER_HEAP_SIZE);
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REGION_ALIAS("REGION_TEXT" , PSRAM_BOOT_SW);
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REGION_ALIAS("REGION_RODATA" , PSRAM_BOOT_SW);
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REGION_ALIAS("REGION_DATA" , PSRAM_BOOT_SW);
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REGION_ALIAS("REGION_BSS" , PSRAM_BOOT_SW);
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REGION_ALIAS("REGION_PSRAM_SW" , PSRAM_BOOT_SW);
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ENTRY(Reset_Handler)
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SECTIONS
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{
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.text : AT(ADDR(.text)){
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. = ALIGN(0x8) ;
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__stext = . ;
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KEEP(*startup_gcc.o(*.text*))
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*(.text)
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*(.text*)
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*(.text.*)
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*(.gnu.warning)
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*(.stub)
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*(.gnu.linkonce.t*)
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*(.glue_7t)
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*(.glue_7)
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*(.jcr)
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*(.init)
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*(.fini)
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. = ALIGN(0x10) ;
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__etext = . ;
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} > REGION_TEXT
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.eh_frame_hdr : {
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*(.eh_frame_hdr)
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} > REGION_TEXT
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.eh_frame : ONLY_IF_RO {
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KEEP (*(.eh_frame))
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} > REGION_TEXT
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.gcc_except_table : ONLY_IF_RO {
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*(.gcc_except_table .gcc_except_table.*)
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} > REGION_TEXT
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.rodata :{
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. = ALIGN(0x8) ;
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__srodata = .;
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*(.rdata)
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*(.rdata*)
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*(.rdata1)
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*(.rdata.*)
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*(.rodata)
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*(.rodata1)
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*(.rodata*)
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*(.rodata.*)
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*(.srodata*)
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*(.rodata.str1.4)
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. = ALIGN(0x8) ;
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__ctor_start__ = .;
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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__ctor_end__ = .;
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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__dtor_end__ = .;
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. = ALIGN(0x8) ;
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__erodata = .;
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__rodata_end__ = .;
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} > REGION_RODATA
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.data : {
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. = ALIGN(0x8) ;
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__data_start__ = . ;
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__sdata = . ;
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data_start = . ;
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KEEP(*startup_gcc.o(*.vectors*))
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*(.got.plt)
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*(.got)
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*(.gnu.linkonce.r*)
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*(.data)
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*(.data*)
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*(.data1)
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*(.data.*)
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*(.gnu.linkonce.d*)
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*(.data1)
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*(.gcc_except_table)
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*(.gcc_except_table*)
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. = ALIGN(8) ;
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__console_init_start = .;
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KEEP(*(.tinyspl.console.cmd))
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. = ALIGN(8) ;
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__console_init_end = .;
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__global_pointer$ = .;
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.note.ABI-tag)
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__edata = .;
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__data_end__ = .;
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. = ALIGN(0x8) ;
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} > REGION_DATA AT > REGION_RODATA
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.eh_frame : ONLY_IF_RW {
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KEEP (*(.eh_frame))
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} > REGION_DATA AT > REGION_RODATA
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.gcc_except_table : ONLY_IF_RW {
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*(.gcc_except_table .gcc_except_table.*)
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__edata = .;
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__data_end__ = .;
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} > REGION_DATA AT > REGION_RODATA
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.bss : {
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. = ALIGN(0x8) ;
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__sbss = ALIGN(0x8) ;
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__bss_start__ = . ;
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.scommon)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(COMMON)
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. = ALIGN(0x8) ;
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__ebss = . ;
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__end = . ;
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end = . ;
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__bss_end__ = .;
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} > REGION_BSS
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.psram_sw_heap : {
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. = ALIGN(0x8) ;
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__psram_sw_heap_start = .;
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. += __min_heap_size;
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. = ALIGN(0x8) ;
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} > REGION_PSRAM_SW AT > REGION_PSRAM_SW
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}
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