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<div class=" wh_topic_content body "><main role="main"><article class="- topic/topic topic" role="article" aria-labelledby="ariaid-title1"><span class="edit-link" style="font-size:12px; opacity:0.6; text-align:right; vertical-align:middle"><a target="_blank" href="http://172.16.35.88/tasks/jdssno1uvvbf2mltu9kb9v3if05d5gopuakboe8hlud18rma/edit/F:/aicdita/aicdita-cn/topics/sdk/display/disp_conf_h.dita">Edit online</a></span><h1 class="- topic/title title topictitle1" id="ariaid-title1">disp_conf 头文件配置</h1><div class="date inPage">15 Jan 2024</div><div style="color: gray;">
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Read time: 3 minute(s)
|
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</div><div class="- topic/body body"><p class="- topic/p p" data-ofbid="d168138e19__20250121171619">在显示驱动中，<code class="+ topic/ph pr-d/codeph ph codeph">disp_conf.h</code> 头文件用于配置显示接口的宏定义。引入 <code class="+ topic/ph pr-d/codeph ph codeph">disp_conf.h</code>
|
||
头文件是为了避免 menuconfig 参数过多导致误改。这部分参数可方便 PCB layout
|
||
走线，配置有误会导致显示异常。推荐在硬件工程师的确认下，结合芯片手册进行修改。</p><p class="- topic/p p" data-ofbid="d168138e27__20250121171619">本节介绍了常见的 <a class="- topic/xref xref" href="disp_conf_h.html#id__section_b53_vcx_ddc">LVDS</a>
|
||
和 <a class="- topic/xref xref" href="disp_conf_h.html#id__section_iwq_vcx_ddc">MIPI-DSI</a>
|
||
参数及其配置。</p><section class="- topic/section section" id="id__section_b53_vcx_ddc" data-ofbid="id__section_b53_vcx_ddc"><h2 class="- topic/title title sectiontitle">LVDS 参数</h2>
|
||
|
||
<pre class="+ topic/pre pr-d/codeblock pre codeblock language-c" id="id__codeblock_mfv_hdx_ddc" data-ofbid="id__codeblock_mfv_hdx_ddc"><em class="hl-comment">/* lvds link swap enable, swap lvds link0 and link1 */</em>
|
||
#<span class="hl-directive">define</span> AIC_LVDS_LINK_SWAP_EN <span class="hl-number">0</span>
|
||
|
||
<span class="hl-tag-doctype-comment">/**
|
||
* lvds channel output order
|
||
*
|
||
* works on both link0 and link1 (if exists)
|
||
*
|
||
* default D3 CK D2 D1 D0
|
||
* 4 3 2 1 0
|
||
*/</span>
|
||
#<span class="hl-directive">define</span> AIC_LVDS_LINES <span class="hl-number">0x43210</span>
|
||
|
||
<span class="hl-tag-doctype-comment">/**
|
||
* lvds channel polarities, works on both link0 and link1 (if exists)
|
||
*/</span>
|
||
#<span class="hl-directive">define</span> AIC_LVDS_POL <span class="hl-number">0x0</span>
|
||
|
||
<span class="hl-tag-doctype-comment">/**
|
||
* lvds channel phy config, works on both link0 and link1 (if exists)
|
||
*/</span>
|
||
#<span class="hl-directive">define</span> AIC_LVDS_PHY <span class="hl-number">0xFA</span></pre>
|
||
|
||
</section><div class="table-container"><table class="- topic/table table" id="id__table_mrr_n2x_ddc" data-ofbid="id__table_mrr_n2x_ddc" data-cols="3"><caption class="- topic/title title tablecap" data-caption-side="top" data-is-repeated="true"><span class="table--title-label">表<span class="table--title-label-number"> 1</span><span class="table--title-label-punctuation">. </span></span><span class="table--title">LVDS 参数详细描述</span></caption><colgroup><col style="width:27.272727272727277%"/><col style="width:25.252525252525253%"/><col style="width:47.474747474747474%"/></colgroup><thead class="- topic/thead thead"><tr class="- topic/row"><th class="- topic/entry entry colsep-0 rowsep-0" id="id__table_mrr_n2x_ddc__entry__1">参数名称</th><th class="- topic/entry entry colsep-0 rowsep-0" id="id__table_mrr_n2x_ddc__entry__2">功能定义</th><th class="- topic/entry entry colsep-0 rowsep-0" id="id__table_mrr_n2x_ddc__entry__3">备注</th></tr></thead><tbody class="- topic/tbody tbody"><tr class="- topic/row"><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__1">AIC_LVDS_SYNC_MODE_EN</td><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__2">LVDS 同步前端信号模式使能。</td><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__3"> 防止前端给到半帧数据时打开 LVDS 模块，出现显示异常，不推荐关闭。</td></tr><tr class="- topic/row"><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__1">AIC_LVDS_LINK_SWAP_EN</td><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__2">LVDS Link 互换使能，Link 0 通道与 Link 1 通道输出互换</td><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__3">默认值：禁用 (0)</td></tr><tr class="- topic/row"><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__1">AIC_LVDS_LINES</td><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__2">LVDS Link 通道内输出选择。</td><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__3">控制 LVDS Link 内部五个通道的差分信号输出，允许五对差分信号任意互换：<ul class="- topic/ul ul" id="id__ul_h1x_fdx_ddc" data-ofbid="id__ul_h1x_fdx_ddc"><li class="- topic/li li" data-ofbid="d168138e85__20250121171619">默认值：0x43210</li><li class="- topic/li li" data-ofbid="d168138e87__20250121171619">五个通道：D3 CK D2 D1 D0。</li><li class="- topic/li li" data-ofbid="d168138e89__20250121171619">0x43210：缺省值，<strong class="+ topic/ph hi-d/b ph b">4 个 bit</strong> 表示一个通道。D3 通道输出 D3，CK 通道输出 CK，D2 通道输出
|
||
D2，D1 通道输出 D1，D0 通道输出 D0。</li><li class="- topic/li li" data-ofbid="d168138e94__20250121171619">0x01234：D3 通道输出 D0，CK 通道输出 D1，D2 通道输出 D2，D1 通道输出 CK，D0 通道输出
|
||
D3。</li></ul></td></tr><tr class="- topic/row"><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__1">AIC_LVDS_POL</td><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__2">
|
||
<p class="- topic/p p" data-ofbid="d168138e101__20250121171619">LVDS 通道极性控制</p>
|
||
</td><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__3">
|
||
<div class="- topic/p p" data-ofbid="d168138e106__20250121171619"><strong class="+ topic/ph hi-d/b ph b">低 5 bit</strong> 分别控制 LVDS 五个通道差分信号的极性，通道默认顺序为 D3 CK D2 D1 D0：<ul class="- topic/ul ul" id="id__ul_gjv_g2x_ddc" data-ofbid="id__ul_gjv_g2x_ddc"><li class="- topic/li li" data-ofbid="d168138e111__20250121171619">0x3 表示 D1 D0 通道极性反相</li><li class="- topic/li li" data-ofbid="d168138e113__20250121171619">0x8 表示 CK 通道反相</li></ul></div>
|
||
<p class="- topic/p p" data-ofbid="d168138e116__20250121171619">AIC_LVDS_POL 受 AIC_LVDS_LINES 影响，如果 CK 通道选择输出 D0，则该 bit 控制 D0 相位，0x8
|
||
表示 D0 反相。</p>
|
||
</td></tr><tr class="- topic/row"><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__1">AIC_LVDS_PHY</td><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__2">LVDS 物理层控制</td><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_mrr_n2x_ddc__entry__3">对应芯片手册 LVDS_0_PHY_CTL 和 LVDS_1_PHY_CTL 寄存器的数值，结合芯片手册进行修改。</td></tr></tbody></table></div><section class="- topic/section section" id="id__section_iwq_vcx_ddc" data-ofbid="id__section_iwq_vcx_ddc"><h2 class="- topic/title title sectiontitle">MIPI-DSI 参数</h2>
|
||
|
||
<pre class="+ topic/pre pr-d/codeblock pre codeblock language-c" id="id__codeblock_j5l_3dx_ddc" data-ofbid="id__codeblock_j5l_3dx_ddc"><em class="hl-comment">/* data line assignments */</em>
|
||
#<span class="hl-directive">define</span> LANE_ASSIGNMENTS <span class="hl-number">0x0123</span>;
|
||
|
||
<em class="hl-comment">/* data line polarities */</em>
|
||
#<span class="hl-directive">define</span> LANE_POLARITIES <span class="hl-number">0</span>b1111;
|
||
|
||
<em class="hl-comment">/* data clk inverse */</em>
|
||
#<span class="hl-directive">define</span> CLK_INVERSE <span class="hl-number">1</span></pre>
|
||
|
||
<div class="table-container"><table class="- topic/table table frame-all" id="id__table_tc2_n2x_ddc" data-ofbid="id__table_tc2_n2x_ddc" data-cols="3"><caption class="- topic/title title tablecap" data-caption-side="top" data-is-repeated="true"><span class="table--title-label">表<span class="table--title-label-number"> 2</span><span class="table--title-label-punctuation">. </span></span><span class="table--title">MIPI-DSI 参数详细描述</span></caption><colgroup><col style="width:21.581196581196583%"/><col style="width:21.36752136752137%"/><col style="width:57.05128205128205%"/></colgroup><thead class="- topic/thead thead"><tr class="- topic/row"><th class="- topic/entry entry colsep-1 rowsep-1" id="id__table_tc2_n2x_ddc__entry__1">参数名称</th><th class="- topic/entry entry colsep-1 rowsep-1" id="id__table_tc2_n2x_ddc__entry__2">功能定义</th><th class="- topic/entry entry colsep-0 rowsep-1" id="id__table_tc2_n2x_ddc__entry__3">备注</th></tr></thead><tbody class="- topic/tbody tbody"><tr class="- topic/row"><td class="- topic/entry entry colsep-1 rowsep-1" headers="id__table_tc2_n2x_ddc__entry__1">LANE_ASSIGNMENTS</td><td class="- topic/entry entry colsep-1 rowsep-1" headers="id__table_tc2_n2x_ddc__entry__2">数据通道输出选择，方便 layout 走线<p class="- topic/p p" data-ofbid="d168138e155__20250121171619"><strong class="+ topic/ph hi-d/b ph b">4 个 bit</strong> 表示一个通道。</p></td><td class="- topic/entry entry colsep-0 rowsep-1" headers="id__table_tc2_n2x_ddc__entry__3">
|
||
<ul class="- topic/ul ul" id="id__ul_vdn_r2x_ddc" data-ofbid="id__ul_vdn_r2x_ddc"><li class="- topic/li li" data-ofbid="d168138e162__20250121171619"><code class="+ topic/ph pr-d/codeph ph codeph">0x0123</code>：默认值。<ul class="- topic/ul ul" id="id__ul_pcf_x2x_ddc" data-ofbid="id__ul_pcf_x2x_ddc"><li class="- topic/li li" data-ofbid="d168138e167__20250121171619">数据通道 3 输出 DATA0</li><li class="- topic/li li" data-ofbid="d168138e169__20250121171619">数据通道 2 输出 DATA1</li><li class="- topic/li li" data-ofbid="d168138e171__20250121171619">数据通道 1 输出 DATA2</li><li class="- topic/li li" data-ofbid="d168138e173__20250121171619">数据通道 0 输出 DATA3</li></ul></li><li class="- topic/li li" data-ofbid="d168138e175__20250121171619"><code class="+ topic/ph pr-d/codeph ph codeph">0x3012</code>：<ul class="- topic/ul ul" id="id__ul_ivy_x2x_ddc" data-ofbid="id__ul_ivy_x2x_ddc"><li class="- topic/li li" data-ofbid="d168138e180__20250121171619">数据通道 3 输出 DATA3</li><li class="- topic/li li" data-ofbid="d168138e182__20250121171619">数据通道 2 输出 DATA0</li><li class="- topic/li li" data-ofbid="d168138e184__20250121171619">数据通道 1 输出 DATA1</li><li class="- topic/li li" data-ofbid="d168138e186__20250121171619">数据通道 0 输出 DATA2</li></ul></li><li class="- topic/li li" data-ofbid="d168138e188__20250121171619"><code class="+ topic/ph pr-d/codeph ph codeph">0x01</code>：如果是两个 lane，表示数据通道 1 输出 DATA0，数据通道 0 输出
|
||
DATA1。</li></ul>
|
||
</td></tr><tr class="- topic/row"><td class="- topic/entry entry colsep-1 rowsep-1" headers="id__table_tc2_n2x_ddc__entry__1">LANE_POLARITIES</td><td class="- topic/entry entry colsep-1 rowsep-1" headers="id__table_tc2_n2x_ddc__entry__2">数据通道极性是否正负极取反</td><td class="- topic/entry entry colsep-0 rowsep-1" headers="id__table_tc2_n2x_ddc__entry__3">默认值：0b1111<p class="- topic/p p" data-ofbid="d168138e200__20250121171619"><strong class="+ topic/ph hi-d/b ph b">二进制参数，1 个 bit</strong> 对应一个通道，与 LANE_ASSIGNMENTS
|
||
配置的通道顺序保持一致。</p><p class="- topic/p p" data-ofbid="d168138e204__20250121171619">示例：LANE_ASSIGNMENTS = <0x3012>，
|
||
LANE_POLARITIES = <0b1010>，表示 DATA3 和 DATA1
|
||
正负极取反。</p></td></tr><tr class="- topic/row"><td class="- topic/entry entry colsep-1 rowsep-0" headers="id__table_tc2_n2x_ddc__entry__1">
|
||
<p class="- topic/p p" data-ofbid="d168138e209__20250121171619">CLK_INVERSE</p>
|
||
</td><td class="- topic/entry entry colsep-1 rowsep-0" headers="id__table_tc2_n2x_ddc__entry__2">
|
||
<p class="- topic/p p" data-ofbid="d168138e214__20250121171619">CLK Lane 正负极取反</p>
|
||
</td><td class="- topic/entry entry colsep-0 rowsep-0" headers="id__table_tc2_n2x_ddc__entry__3">-</td></tr></tbody></table></div>
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|
||
<div class=" wh_topic_toc "><div class="wh_topic_label">在本页上</div><ul><li class="section-item"><div class="section-title"><a href="#id__section_b53_vcx_ddc" data-tocid="id__section_b53_vcx_ddc">LVDS 参数</a></div></li><li class="section-item"><div class="section-title"><a href="#id__section_iwq_vcx_ddc" data-tocid="id__section_iwq_vcx_ddc">MIPI-DSI 参数</a></div></li></ul></div>
|
||
|
||
</div>
|
||
</nav>
|
||
|
||
</div>
|
||
</div>
|
||
|
||
|
||
|
||
</div>
|
||
<footer class="navbar navbar-default wh_footer">
|
||
<div class=" footer-container mx-auto ">
|
||
<title>footer def</title>
|
||
<style><!--
|
||
|
||
.p1 {
|
||
font-family: FangZhengShuSong, Times, serif;
|
||
}
|
||
.p2 {
|
||
font-family: Arial, Helvetica, sans-serif;
|
||
}
|
||
.p3 {
|
||
font-family: "Lucida Console", "Courier New", monospace;
|
||
}
|
||
|
||
--></style>
|
||
|
||
|
||
|
||
|
||
|
||
|
||
|
||
|
||
|
||
|
||
|
||
<div class="webhelp.fragment.footer">
|
||
<p class="p1">Copyright © 2019-2024 广东匠芯创科技有限公司. All rights reserved.</p>
|
||
</div><div>
|
||
<div class="generation_time">
|
||
Update Time: 2025-01-21
|
||
</div>
|
||
</div>
|
||
</div>
|
||
</footer>
|
||
|
||
<div id="go2top" class="d-print-none">
|
||
<span class="oxy-icon oxy-icon-up"></span>
|
||
</div>
|
||
|
||
<div id="modal_img_large" class="modal">
|
||
<span class="close oxy-icon oxy-icon-remove"></span>
|
||
<div id="modal_img_container"></div>
|
||
<div id="caption"></div>
|
||
</div>
|
||
|
||
|
||
<script src="${pd}/publishing/publishing-styles-AIC-template/js/custom.js" defer="defer"></script>
|
||
|
||
|
||
</body>
|
||
</html> |