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href="../../../topics/chapter-title/chapter-interface-sdk.html" id="concept_nww_hzh_pzb-d5856e4868-link">接口</a><div class="wh-tooltip"><p class="shortdesc">CAN<span class="ph">、CAP</span>、CIR、GPAI、GPIO、I2C、PSADC、PWM 等接口模块的介绍和使用说明。</p></div></div></div></li><li role="treeitem" aria-expanded="false"><div data-tocid="chapter-safety-d5856e6083" class="topicref" data-id="chapter-safety" data-state="not-ready"><span role="button" tabindex="0" aria-labelledby="button-expand-action chapter-safety-d5856e6083-link" class="wh-expand-btn"></span><div class="title"><a href="../../../topics/chapter-title/chapter-safety-sdk.html" id="chapter-safety-d5856e6083-link">安全</a><div class="wh-tooltip"><p class="shortdesc">SPI ENC、CE、eFuse 等安全模块的介绍和使用说明。</p></div></div></div></li></ul></li></ul></div>
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<div class=" wh_topic_content body "><main role="main"><article class="- topic/topic concept/concept topic concept" role="article" aria-labelledby="ariaid-title1"><span class="edit-link" style="font-size:12px; opacity:0.6; text-align:right; vertical-align:middle"><a target="_blank" href="http://172.16.35.88/tasks/jdssno1uvvbf2mltu9kb9v3if05d5gopuakboe8hlud18rma/edit/F:/aicdita/aicdita-cn/topics/sdk/dma/dma-demo-lite.dita">Edit online</a></span><h1 class="- topic/title title topictitle1" id="ariaid-title1">Demo</h1><div class="date inPage">15 Jan 2024</div><div style="color: gray;">
|
||
Read time: 6 minute(s)
|
||
</div><div class="- topic/body concept/conbody body conbody"><section class="- topic/section section" id="demo__section_fgt_2zf_f1c" data-ofbid="demo__section_fgt_2zf_f1c"><h2 class="- topic/title title sectiontitle">Mem to Device</h2>
|
||
|
||
<div class="- topic/p p" data-ofbid="d205562e31__20250121171637">SPI 驱动（详见
|
||
<span class="+ topic/ph sw-d/filepath ph filepath">bsp/artinchip/hal/qspi/aic_hal_qspi.c</span>）中调用了 DMA 进行数据传输，其使用过程可以当作 Demo 参考：<pre class="+ topic/pre pr-d/codeblock pre codeblock language-c" id="demo__codeblock_wqc_3qs_c1c" data-ofbid="demo__codeblock_wqc_3qs_c1c"><strong class="hl-keyword">static</strong> s32 qspi_tx_rx_dma(u32 base, u8 *tx, u32 txlen, u8 *rx, u32 rxlen)
|
||
{
|
||
u32 poll_time, single_len;
|
||
s32 ret = <span class="hl-number">0</span>;
|
||
single_len = <span class="hl-number">0</span>;
|
||
<strong class="hl-keyword">struct</strong> aic_dma_chan *rx_dma, *tx_dma;
|
||
<strong class="hl-keyword">struct</strong> dma_slave_config dmacfg;
|
||
|
||
qspi_reset_fifo(base);
|
||
tx_dma = NULL;
|
||
rx_dma = NULL;
|
||
<strong class="hl-keyword">if</strong> (tx) {
|
||
spi_setbits(FCR_BIT_TX_DMA_EN, SPI_REG_FCR(base));
|
||
<strong class="hl-keyword">if</strong> (qspi_in_single_mode(base))
|
||
single_len = txlen;
|
||
qspi_set_xfer_cnt(base, txlen, <span class="hl-number">0</span>, single_len, <span class="hl-number">0</span>);
|
||
|
||
tx_dma = hal_request_dma_chan();
|
||
<strong class="hl-keyword">if</strong> (!tx_dma)
|
||
<strong class="hl-keyword">goto</strong> out;
|
||
dmacfg.direction = DMA_MEM_TO_DEV;
|
||
dmacfg.src_addr = (<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong>)tx;
|
||
dmacfg.dst_addr = (<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong>)SPI_REG_TXD(base);
|
||
dmacfg.src_addr_width = DMA_SLAVE_BUSWIDTH_<span class="hl-number">4</span>_BYTES;
|
||
dmacfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_<span class="hl-number">4</span>_BYTES;
|
||
dmacfg.src_maxburst = <span class="hl-number">1</span>;
|
||
dmacfg.dst_maxburst = <span class="hl-number">1</span>;
|
||
dmacfg.slave_id = <span class="hl-number">10</span>; <em class="hl-comment">// FIXME: should set id according spi id</em>
|
||
ret = hal_dma_chan_config(tx_dma, &dmacfg);
|
||
<strong class="hl-keyword">if</strong> (ret)
|
||
<strong class="hl-keyword">goto</strong> out;
|
||
ret = hal_dma_chan_prep_device(
|
||
tx_dma, (uint32_t)(<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong>)SPI_REG_TXD(base),
|
||
(uint32_t)(<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong>)tx, txlen, DMA_MEM_TO_DEV);
|
||
<strong class="hl-keyword">if</strong> (ret)
|
||
<strong class="hl-keyword">goto</strong> out;
|
||
ret = hal_dma_chan_start(tx_dma);
|
||
<strong class="hl-keyword">if</strong> (ret)
|
||
<strong class="hl-keyword">goto</strong> out;
|
||
|
||
<em class="hl-comment">/* Start transfer */</em>
|
||
spi_setbits(TCR_BIT_XCH, SPI_REG_TCR(base));
|
||
|
||
poll_time = <span class="hl-number">0x7FFFFFFF</span>;
|
||
<strong class="hl-keyword">while</strong> (!(readl(SPI_REG_ISR(base)) & ISR_BIT_TC)) {
|
||
poll_time--;
|
||
<strong class="hl-keyword">if</strong> (poll_time == <span class="hl-number">0</span>) {
|
||
ret = -<span class="hl-number">1</span>;
|
||
spi_clrbits(FCR_BIT_TX_DMA_EN, SPI_REG_FCR(base));
|
||
hal_log_err(<span class="hl-string">"TX Transfer complete timeout at the end.\n"</span>);
|
||
<strong class="hl-keyword">goto</strong> out;
|
||
}
|
||
}
|
||
|
||
spi_setbits(ISR_BIT_TX_EMP, SPI_REG_ISR(base));
|
||
spi_setbits(ISR_BIT_TX_FULL, SPI_REG_ISR(base));
|
||
spi_setbits(ISR_BIT_TX_RDY, SPI_REG_ISR(base));
|
||
spi_setbits(ISR_BIT_TC, SPI_REG_ISR(base));
|
||
spi_clrbits(FCR_BIT_TX_DMA_EN, SPI_REG_FCR(base));
|
||
}
|
||
|
||
<strong class="hl-keyword">if</strong> (rx) {
|
||
spi_setbits(FCR_BIT_RX_DMA_EN, SPI_REG_FCR(base));
|
||
qspi_set_xfer_cnt(base, <span class="hl-number">0</span>, rxlen, <span class="hl-number">0</span>, <span class="hl-number">0</span>);
|
||
|
||
rx_dma = hal_request_dma_chan();
|
||
<strong class="hl-keyword">if</strong> (!rx_dma)
|
||
<strong class="hl-keyword">goto</strong> out;
|
||
dmacfg.direction = DMA_DEV_TO_MEM;
|
||
dmacfg.src_addr = (<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong>)SPI_REG_RXD(base);
|
||
dmacfg.dst_addr = (<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong>)rx;
|
||
dmacfg.src_addr_width = DMA_SLAVE_BUSWIDTH_<span class="hl-number">4</span>_BYTES;
|
||
dmacfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_<span class="hl-number">4</span>_BYTES;
|
||
dmacfg.src_maxburst = <span class="hl-number">1</span>;
|
||
dmacfg.dst_maxburst = <span class="hl-number">1</span>;
|
||
dmacfg.slave_id = <span class="hl-number">10</span>; <em class="hl-comment">// FIXME: should set id according spi id</em>
|
||
ret = hal_dma_chan_config(rx_dma, &dmacfg);
|
||
<strong class="hl-keyword">if</strong> (ret)
|
||
<strong class="hl-keyword">goto</strong> out;
|
||
ret =
|
||
hal_dma_chan_prep_device(rx_dma, (uint32_t)(<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong>)rx,
|
||
(uint32_t)(<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong>)SPI_REG_RXD(base),
|
||
rxlen, DMA_DEV_TO_MEM);
|
||
<strong class="hl-keyword">if</strong> (ret)
|
||
<strong class="hl-keyword">goto</strong> out;
|
||
ret = hal_dma_chan_start(rx_dma);
|
||
<strong class="hl-keyword">if</strong> (ret)
|
||
<strong class="hl-keyword">goto</strong> out;
|
||
|
||
<em class="hl-comment">/* Start transfer */</em>
|
||
spi_setbits(TCR_BIT_XCH, SPI_REG_TCR(base));
|
||
poll_time = <span class="hl-number">0x7FFFFFFF</span>;
|
||
<strong class="hl-keyword">while</strong> (!(readl(SPI_REG_ISR(base)) & ISR_BIT_TC)) {
|
||
poll_time--;
|
||
<strong class="hl-keyword">if</strong> (poll_time == <span class="hl-number">0</span>) {
|
||
ret = -<span class="hl-number">1</span>;
|
||
spi_clrbits(FCR_BIT_TX_DMA_EN, SPI_REG_FCR(base));
|
||
hal_log_err(<span class="hl-string">"RX Transfer complete timeout at the end.\n"</span>);
|
||
<strong class="hl-keyword">goto</strong> out;
|
||
}
|
||
}
|
||
|
||
spi_setbits(ISR_BIT_TC, SPI_REG_ISR(base));
|
||
spi_setbits(ISR_BIT_RX_EMP, SPI_REG_ISR(base));
|
||
spi_setbits(ISR_BIT_RX_FULL, SPI_REG_ISR(base));
|
||
spi_setbits(ISR_BIT_RX_RDY, SPI_REG_ISR(base));
|
||
spi_clrbits(FCR_BIT_TX_DMA_EN, SPI_REG_FCR(base));
|
||
}
|
||
|
||
out:
|
||
<strong class="hl-keyword">if</strong> (tx_dma) {
|
||
hal_dma_chan_stop(tx_dma);
|
||
hal_release_dma_chan(tx_dma);
|
||
}
|
||
<strong class="hl-keyword">if</strong> (rx_dma) {
|
||
hal_dma_chan_stop(rx_dma);
|
||
hal_release_dma_chan(rx_dma);
|
||
}
|
||
<strong class="hl-keyword">return</strong> ret;
|
||
}</pre></div>
|
||
</section><section class="- topic/section section" id="demo__section_xnr_hzf_f1c" data-ofbid="demo__section_xnr_hzf_f1c"><h2 class="- topic/title title sectiontitle">Mem to Mem</h2>
|
||
|
||
<div class="- topic/p p" data-ofbid="d205562e44__20250121171637">本 Demo 是 test_dma_memcpy
|
||
的源码（<span class="+ topic/ph sw-d/filepath ph filepath">bsp/examples/test-dma/test_dma.c</span>），完成一次 Mem
|
||
的拷贝操作：<pre class="+ topic/pre pr-d/codeblock pre codeblock language-c" id="demo__codeblock_cb5_3zf_f1c" data-ofbid="demo__codeblock_cb5_3zf_f1c"><strong class="hl-keyword">static</strong> <strong class="hl-keyword">void</strong> dma_test_cb(<strong class="hl-keyword">void</strong> *param)
|
||
{
|
||
printf(<span class="hl-string">"DMA complete, callback....\n"</span>);
|
||
}
|
||
|
||
<strong class="hl-keyword">static</strong> <strong class="hl-keyword">void</strong> cmd_test_dma_memcpy(<strong class="hl-keyword">int</strong> argc, <strong class="hl-keyword">char</strong> **argv)
|
||
{
|
||
<strong class="hl-keyword">struct</strong> dma_chan *chan = NULL;
|
||
uint32_t test_len = <span class="hl-number">0</span>, align_len = <span class="hl-number">0</span>;
|
||
<strong class="hl-keyword">char</strong> *src = NULL, *dest = NULL;
|
||
<strong class="hl-keyword">int</strong> ret, i;
|
||
uint32_t size = <span class="hl-number">0</span>;
|
||
#ifdef RT_USING_POSIX_CLOCK
|
||
<strong class="hl-keyword">struct</strong> timespec start, end;
|
||
#endif
|
||
|
||
<strong class="hl-keyword">if</strong> (argc != <span class="hl-number">2</span>) {
|
||
pr_err(<span class="hl-string">"Invalid parameter\n"</span>);
|
||
<strong class="hl-keyword">return</strong>;
|
||
}
|
||
sscanf((<strong class="hl-keyword">char</strong> *)argv[<span class="hl-number">1</span>], <span class="hl-string">"%u"</span>, &test_len);
|
||
|
||
test_len = roundup(test_len, <span class="hl-number">8</span>);
|
||
align_len = roundup(test_len, CACHE_LINE_SIZE);
|
||
|
||
src = aicos_malloc_align(<span class="hl-number">0</span>, align_len, CACHE_LINE_SIZE);
|
||
dest = aicos_malloc_align(<span class="hl-number">0</span>, align_len, CACHE_LINE_SIZE);
|
||
<strong class="hl-keyword">if</strong> ((src == NULL) || (dest == NULL)){
|
||
pr_err(<span class="hl-string">"Alloc %d mem fail!\n "</span>, align_len);
|
||
<strong class="hl-keyword">goto</strong> free_mem;
|
||
}
|
||
|
||
printf(<span class="hl-string">"DMA memcpy test: src = 0x%lx, dest = 0x%lx, len = 0x%x\n"</span>,
|
||
(<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong>)src, (<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong>)dest, test_len);
|
||
|
||
<strong class="hl-keyword">for</strong> (i = <span class="hl-number">0</span>;i < test_len; i++)
|
||
src[i] = i & <span class="hl-number">0xff</span>;
|
||
|
||
#ifdef RT_USING_POSIX_CLOCK
|
||
clock_gettime(CLOCK_REALTIME, &start);
|
||
#endif
|
||
|
||
chan = dma_request_channel();
|
||
<strong class="hl-keyword">if</strong> (chan == NULL){
|
||
pr_err(<span class="hl-string">"Alloc dma chan fail!\n "</span>);
|
||
<strong class="hl-keyword">goto</strong> free_mem;
|
||
}
|
||
|
||
ret = dmaengine_prep_dma_memcpy(chan, (<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong>)dest, (<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong>)src, test_len);
|
||
<strong class="hl-keyword">if</strong> (ret){
|
||
pr_err(<span class="hl-string">"dmaengine_prep_dma_memcpy fail! ret = %d\n "</span>, ret);
|
||
<strong class="hl-keyword">goto</strong> free_chan;
|
||
}
|
||
|
||
ret = dmaengine_submit(chan, dma_test_cb, chan);
|
||
<strong class="hl-keyword">if</strong> (ret){
|
||
pr_err(<span class="hl-string">"dmaengine_submit fail! ret = %d\n "</span>, ret);
|
||
<strong class="hl-keyword">goto</strong> free_chan;
|
||
}
|
||
|
||
dma_async_issue_pending(chan);
|
||
|
||
<strong class="hl-keyword">while</strong> (dmaengine_tx_status(chan, &size) != DMA_COMPLETE);
|
||
aicos_dcache_invalid_range((<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong> *)src, align_len);
|
||
aicos_dcache_invalid_range((<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong> *)dest, align_len);
|
||
#ifdef RT_USING_POSIX_CLOCK
|
||
clock_gettime(CLOCK_REALTIME, &end);
|
||
#endif
|
||
|
||
<strong class="hl-keyword">for</strong> (i = <span class="hl-number">0</span>;i < test_len; i++){
|
||
<strong class="hl-keyword">if</strong> (dest[i] != src[i]){
|
||
printf(<span class="hl-string">"addr 0x%x err: src - 0x%x, dest - 0x%x\n"</span>,
|
||
i, src[i], dest[i]);
|
||
ret = -<span class="hl-number">1</span>;
|
||
}
|
||
}
|
||
|
||
<strong class="hl-keyword">if</strong> (ret)
|
||
printf(<span class="hl-string">"DMA test fail!\n"</span>);
|
||
<strong class="hl-keyword">else</strong>
|
||
printf(<span class="hl-string">"DMA test succeed!\n"</span>);
|
||
|
||
#ifdef RT_USING_POSIX_CLOCK
|
||
printf(<span class="hl-string">"DMA memcpy %u bytes, speed %.2f MB/s\n"</span>, align_len,
|
||
(<strong class="hl-keyword">float</strong>)align_len / <span class="hl-number">1024</span> / <span class="hl-number">1024</span> / time_diff(&start, &end));
|
||
#endif
|
||
|
||
free_chan:
|
||
<strong class="hl-keyword">if</strong> (chan)
|
||
dma_release_channel(chan);
|
||
free_mem:
|
||
<strong class="hl-keyword">if</strong> (src)
|
||
aicos_free_align(<span class="hl-number">0</span>, src);
|
||
<strong class="hl-keyword">if</strong> (dest)
|
||
aicos_free_align(<span class="hl-number">0</span>, dest);
|
||
}</pre></div>
|
||
</section></div></article></main></div>
|
||
|
||
|
||
|
||
|
||
|
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<div class=" wh_topic_toc "><div class="wh_topic_label">在本页上</div><ul><li class="section-item"><div class="section-title"><a href="#demo__section_fgt_2zf_f1c" data-tocid="demo__section_fgt_2zf_f1c">Mem to Device</a></div></li><li class="section-item"><div class="section-title"><a href="#demo__section_xnr_hzf_f1c" data-tocid="demo__section_xnr_hzf_f1c">Mem to Mem</a></div></li></ul></div>
|
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|
||
|
||
|
||
|
||
|
||
|
||
|
||
|
||
<div class="webhelp.fragment.footer">
|
||
<p class="p1">Copyright © 2019-2024 广东匠芯创科技有限公司. All rights reserved.</p>
|
||
</div><div>
|
||
<div class="generation_time">
|
||
Update Time: 2025-01-21
|
||
</div>
|
||
</div>
|
||
</div>
|
||
</footer>
|
||
|
||
<div id="go2top" class="d-print-none">
|
||
<span class="oxy-icon oxy-icon-up"></span>
|
||
</div>
|
||
|
||
<div id="modal_img_large" class="modal">
|
||
<span class="close oxy-icon oxy-icon-remove"></span>
|
||
<div id="modal_img_container"></div>
|
||
<div id="caption"></div>
|
||
</div>
|
||
|
||
|
||
<script src="${pd}/publishing/publishing-styles-AIC-template/js/custom.js" defer="defer"></script>
|
||
|
||
|
||
</body>
|
||
</html> |