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<div class=" wh_topic_content body "><main role="main"><article class="- topic/topic concept/concept topic concept" role="article" aria-labelledby="ariaid-title1"><span class="edit-link" style="font-size:12px; opacity:0.6; text-align:right; vertical-align:middle"><a target="_blank" href="http://172.16.35.88/tasks/jdssno1uvvbf2mltu9kb9v3if05d5gopuakboe8hlud18rma/edit/F:/aicdita/aicdita-cn/topics/sdk/dma/dma-design-guide.dita">Edit online</a></span><h1 class="- topic/title title topictitle1" id="ariaid-title1">设计说明</h1><div class="date inPage">4 Dec 2024</div><div style="color: gray;">
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<p class="- topic/p p" data-ofbid="d77570e24__20250121171524">DMA 源代码位于 <span class="+ topic/ph sw-d/filepath ph filepath">drivers/dma/artinchip-dma.c</span>。</p>
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<p class="- topic/p p" data-ofbid="d77570e30__20250121171524">Linux 提供了一个 DMA Engine 子系统，可封装不同类型的 DMA 控制器驱动，便于 DMA 用户了解硬件细节。</p>
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<div class="- topic/p p" data-ofbid="d77570e33__20250121171524">
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<figure class="- topic/fig fig fignone" id="concept_xwt_1sf_h1c__fig_cdz_kms_c1c" data-ofbid="concept_xwt_1sf_h1c__fig_cdz_kms_c1c"><br/><div class="imagecenter"><img class="- topic/image image imagecenter" id="concept_xwt_1sf_h1c__image_isk_3ms_c1c" src="../../../images/dma/dma_sw_system_lb.png" alt="sw_system20"/></div><br/><figcaption data-caption-side="bottom" class="- topic/title title figcapcenter"><span class="figtitleprefix fig--title-label">图<span class="fig--title-label-number"> 1</span><span class="fig--title-label-punctuation">. </span></span><span class="fig--title">Linux DMA Engine 子系统架构</span></figcaption></figure>
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<div class="- topic/p p" data-ofbid="d77570e43__20250121171524"><a class="- topic/xref xref" href="dma-design-guide.html#concept_xwt_1sf_h1c__fig_cdz_kms_c1c">Linux DMA Engine 子系统架构</a> 展示了 DMA Engine 中的下列组成部分：<ul class="- topic/ul ul" id="concept_xwt_1sf_h1c__ul_jsk_3ms_c1c" data-ofbid="concept_xwt_1sf_h1c__ul_jsk_3ms_c1c"><li class="- topic/li li" data-ofbid="d77570e49__20250121171524"><strong class="+ topic/ph hi-d/b ph b">DMA Device</strong><ul class="- topic/ul ul" id="concept_xwt_1sf_h1c__ul_tqk_xrt_mdc" data-ofbid="concept_xwt_1sf_h1c__ul_tqk_xrt_mdc"><li class="- topic/li li" data-ofbid="d77570e53__20250121171524">对应物理上的一个 Controller。</li><li class="- topic/li li" data-ofbid="d77570e55__20250121171524">DMA Driver 需要提供 Controller 的属性和接口，并注册成为 DMA Device，供后续 DMA Engine
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框架来调用。</li><li class="- topic/li li" data-ofbid="d77570e57__20250121171524">支持注册多个 DMA Device，并使用一个链表 <span class="+ topic/keyword pr-d/parmname keyword parmname">dma_device_list</span>
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来进行管理。</li></ul></li><li class="- topic/li li" data-ofbid="d77570e62__20250121171524"><strong class="+ topic/ph hi-d/b ph b">DMA channel</strong><ul class="- topic/ul ul" id="concept_xwt_1sf_h1c__ul_oqq_2st_mdc" data-ofbid="concept_xwt_1sf_h1c__ul_oqq_2st_mdc"><li class="- topic/li li" data-ofbid="d77570e66__20250121171524">对应物理上的 DMA 通道，如图中 DMA Controller 的 Chx。</li><li class="- topic/li li" data-ofbid="d77570e68__20250121171524">物理 DMA 通道也是通过一个链表进行管理，归属于同一个 DMA Device。</li></ul></li><li class="- topic/li li" data-ofbid="d77570e70__20250121171524"><strong class="+ topic/ph hi-d/b ph b">VC（Virtual channel）</strong><ul class="- topic/ul ul" id="concept_xwt_1sf_h1c__ul_upc_gst_mdc" data-ofbid="concept_xwt_1sf_h1c__ul_upc_gst_mdc"><li class="- topic/li li" data-ofbid="d77570e74__20250121171524">VC，即虚拟通道</li><li class="- topic/li li" data-ofbid="d77570e76__20250121171524">基于物理的 DMA 通道，DMA Engine 提供了一种 VC。</li><li class="- topic/li li" data-ofbid="d77570e78__20250121171524">VC 数目往往多于物理通道数，比如 VC 有 48 个而物理通道只有 8 个，便于提供一种动态的物理通道分配机制。</li></ul></li><li class="- topic/li li" data-ofbid="d77570e80__20250121171524"><strong class="+ topic/ph hi-d/b ph b">DMA Client</strong><ul class="- topic/ul ul" id="concept_xwt_1sf_h1c__ul_srt_jst_mdc" data-ofbid="concept_xwt_1sf_h1c__ul_srt_jst_mdc"><li class="- topic/li li" data-ofbid="d77570e84__20250121171524">DMA 模块的使用者。</li><li class="- topic/li li" data-ofbid="d77570e86__20250121171524">DMA 用户仅限内核中的其他模块，如 SPI、Audio Codec、UART 等。</li><li class="- topic/li li" data-ofbid="d77570e88__20250121171524">暂未提供用户态的使用接口。</li></ul></li></ul></div>
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