2023-08-30 16:21:18 +08:00
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/*
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2024-09-30 17:06:01 +08:00
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* Copyright (c) 2023-2024, ArtInChip Technology Co., Ltd
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2023-08-30 16:21:18 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Authors: xuan.wen <xuan.wen@artinchip.com>
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*/
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#include "inc/spinand.h"
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#include "inc/manufacturer.h"
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2024-01-27 08:47:24 +08:00
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#define SPINAND_MFR_MICRON 0x2c
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2025-01-08 19:12:06 +08:00
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#define MICRON_STATUS_ECC_MASK GENMASK(6, 4)
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#define MICRON_STATUS_ECC_NO_BITFLIPS (0)
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#define MICRON_STATUS_ECC_HAS_1_3_BITFLIPS BIT(4)
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#define MICRON_STATUS_ECC_UNCOR_ERROR BIT(5)
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#define MICRON_STATUS_ECC_HAS_4_6_BITFLIPS GENMASK(5, 4)
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#define MICRON_STATUS_ECC_HAS_7_8_BITFLIPS (BIT(4) | BIT(6))
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2024-01-27 08:47:24 +08:00
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static int mt29f1g01_ecc_get_status(struct aic_spinand *flash, u8 status)
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{
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2025-01-08 19:12:06 +08:00
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switch (status & MICRON_STATUS_ECC_MASK) {
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case MICRON_STATUS_ECC_NO_BITFLIPS:
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2024-01-27 08:47:24 +08:00
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return 0;
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2025-01-08 19:12:06 +08:00
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case MICRON_STATUS_ECC_HAS_1_3_BITFLIPS:
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return 3;
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case MICRON_STATUS_ECC_UNCOR_ERROR:
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2024-01-27 08:47:24 +08:00
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return -SPINAND_ERR_ECC;
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2025-01-08 19:12:06 +08:00
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case MICRON_STATUS_ECC_HAS_4_6_BITFLIPS:
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return 6;
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case MICRON_STATUS_ECC_HAS_7_8_BITFLIPS:
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return 8;
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2024-01-27 08:47:24 +08:00
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default:
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break;
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}
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return -SPINAND_ERR;
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}
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2023-08-30 16:21:18 +08:00
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2025-01-08 19:12:06 +08:00
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static int mt29f1g_ooblayout_user(struct aic_spinand *flash, int section,
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struct aic_oob_region *region)
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{
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if (section > 3)
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return -SPINAND_ERR;
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region->offset = (8 * section) + 32;
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region->length = 8;
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return 0;
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}
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2023-08-30 16:21:18 +08:00
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const struct aic_spinand_info micron_spinand_table[] = {
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2024-01-27 08:47:24 +08:00
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/*devid page_size oob_size block_per_lun pages_per_eraseblock planes_per_lun
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is_die_select*/
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2023-08-30 16:21:18 +08:00
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/*MT29F1G01ABAFD*/
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2024-01-27 08:47:24 +08:00
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{ DEVID(0x14), PAGESIZE(2048), OOBSIZE(128), BPL(1024), PPB(64),
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PLANENUM(1), DIE(0), "micron 128MB: 2048+128@64@1024", cmd_cfg_table,
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2025-01-08 19:12:06 +08:00
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mt29f1g01_ecc_get_status, mt29f1g_ooblayout_user},
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2023-08-30 16:21:18 +08:00
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/*MT29F2G01ABAGD*/
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2024-01-27 08:47:24 +08:00
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/*ZD35Q2GC-IB*/
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/*XT26G02E*/
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{ DEVID(0x24), PAGESIZE(2048), OOBSIZE(128), BPL(2048), PPB(64),
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2025-01-08 19:12:06 +08:00
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PLANENUM(2), DIE(0), "micron 256MB: 2048+128@64@2048", cmd_cfg_table,
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mt29f1g01_ecc_get_status, mt29f1g_ooblayout_user },
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2023-08-30 16:21:18 +08:00
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};
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const struct aic_spinand_info *micron_spinand_detect(struct aic_spinand *flash)
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{
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2024-09-30 17:06:01 +08:00
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u8 *id = flash->id.data;
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2023-08-30 16:21:18 +08:00
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2024-09-30 17:06:01 +08:00
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if (id[0] != SPINAND_MFR_MICRON)
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2023-08-30 16:21:18 +08:00
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return NULL;
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2024-09-30 17:06:01 +08:00
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return spinand_match_and_init(&id[1], micron_spinand_table,
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2023-08-30 16:21:18 +08:00
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ARRAY_SIZE(micron_spinand_table));
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};
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static int micron_spinand_init(struct aic_spinand *flash)
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{
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return 0;
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};
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static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = {
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.detect = micron_spinand_detect,
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.init = micron_spinand_init,
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};
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const struct spinand_manufacturer micron_spinand_manufacturer = {
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.id = SPINAND_MFR_MICRON,
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.name = "micron",
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.ops = µn_spinand_manuf_ops,
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};
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