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v1.1.2:add audio and efuse patch

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刘可亮
2025-03-14 16:31:58 +08:00
parent fe0b990053
commit 049676e8a8
27 changed files with 380 additions and 119 deletions
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29
bsp/artinchip/sys/d12x/ram_param.c
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@@ -1,5 +1,8 @@
/*
* Copyright (C) 2024 ArtInChip Technology Co.,Ltd
* Copyright (C) 2024-2025 ArtInChip Technology Co.,Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
* Author: Xiong Hao <hao.xiong@artinchip.com>
*/
@@ -8,6 +11,10 @@
#include <aic_common.h>
#include <ram_param.h>
#define EFUSE_CMU_REG ((void *)0x18020904)
#define EFUSE_218_REG ((void *)0x19010218)
#define EFUSE_21C_REG ((void *)0x1901021c)
#define PSRAM_SINGLE 0
#define PSRAM_PARALLEL 1
@@ -42,20 +49,26 @@ struct _psram_info {
/* D121BBV 8M */ \
{0x04, PSRAM_PARALLEL, 0x800000, {APS3208K, 0x80c980c9}}, \
/* D122BCV1 16M SCKW18X128160AAE1 */ \
{0x05, PSRAM_PARALLEL, 0x1000000, {SCKW18_12816O, 0xc59ac59a}}, \
{0x05, PSRAM_PARALLEL, 0x1000000, {SCKW18_12816O, 0xc59ac59a}}, \
/* D122BCV2 16M AP12816 */ \
{0x05, PSRAM_PARALLEL, 0x1000000, {APS12816O, 0xdd8ddd8d}}, \
{0x05, PSRAM_PARALLEL, 0x1000000, {APS12816O, 0xdd8ddd8d}}, \
/* D123BAV 4M */ \
{0x07, PSRAM_SINGLE, 0x400000, {APS3208K, 0x80c980c9}}, \
/* D123BBV 8M */ \
{0x08, PSRAM_PARALLEL, 0x800000, {APS3208K, 0x80c980c9}}, \
/* D123BCV 16M */ \
{0x09, PSRAM_PARALLEL, 0x1000000, {APS12816O, 0xdd8ddd8d}}, \
/* TR230 8M */ \
{0xA1, PSRAM_PARALLEL, 0x800000, {APS3208K, 0x80c980c9}}, \
{0xA1, PSRAM_PARALLEL, 0x800000, {APS3208K, 0x80c980c9}}, \
/* JYX58 8M */ \
{0xB1, PSRAM_PARALLEL, 0x800000, {APS3208K, 0x80c980c9}}, \
{0xB1, PSRAM_PARALLEL, 0x800000, {APS3208K, 0x80c980c9}}, \
}
struct _psram_info psram_table_info[] = PSRAM_TABLE_INFO;
u8 psram_get_mark_id(void)
{
u32 fuse_218 = readl(0x19010218);
u32 fuse_218 = readl(EFUSE_218_REG);
u8 mark_id = fuse_218 & 0xff;
pr_info("fuse_218(0x19010218)=0x%x, mark_id=0x%x\n", fuse_218, mark_id);
@@ -64,7 +77,7 @@ u8 psram_get_mark_id(void)
u8 psram_get_psram_id(void)
{
u32 fuse_21c = readl(0x1901021c);
u32 fuse_21c = readl(EFUSE_21C_REG);
u8 psram_id = (fuse_21c & 0xff) >> 4;
pr_info("fuse_21c(0x1901021c)=0x%x, psram_id=0x%x\n", fuse_21c, psram_id);
@@ -90,9 +103,11 @@ u32 aic_get_ram_size(void)
struct _psram_info *psram_info;
u8 mark_id, psram_id;
writel(0x1100, EFUSE_CMU_REG);
mark_id = psram_get_mark_id();
psram_id = psram_get_psram_id();
psram_info = psram_get_info(mark_id, psram_id);
writel(0x0, EFUSE_CMU_REG);
return psram_info->psram_size;
}