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v1.0.3

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刘可亮
2024-01-27 08:47:24 +08:00
parent d3bd993b5f
commit 9f7ba67007
2345 changed files with 74421 additions and 76616 deletions
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22
bsp/artinchip/drv_bare/spinand/spinand_port.c
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@@ -22,6 +22,18 @@
//#define AIC_BOOT_QSPI_DRV_DEBUG
#if defined(AIC_QSPI_DRV_V10)
#if defined(AIC_BOOTLOADER)
#define DMA_SLAVE_MAXBURST_DEFAULT 8
#else
#define DMA_SLAVE_MAXBURST_DEFAULT 1
#endif
#elif defined(AIC_QSPI_DRV_V20)
#define DMA_SLAVE_MAXBURST_DEFAULT 1
#else
#define DMA_SLAVE_MAXBURST_DEFAULT 8
#endif
static struct aic_qspi qspi_controller[] = {
#if defined(AIC_USING_QSPI0)
{
@@ -333,10 +345,12 @@ u32 qspi_configure(struct aic_qspi *qspi,
struct qspi_master_dma_config dmacfg;
memset(&dmacfg, 0, sizeof(dmacfg));
dmacfg.port_id = qspi->dma_port_id;
dmacfg.tx_bus_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
dmacfg.rx_bus_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
dmacfg.tx_max_burst = 1;
dmacfg.rx_max_burst = 8;
dmacfg.tx_bus_width = DMA_SLAVE_BUSWIDTH_UNDEFINED;
dmacfg.rx_bus_width = DMA_SLAVE_BUSWIDTH_UNDEFINED;
dmacfg.tx_max_burst = DMA_SLAVE_MAXBURST_DEFAULT;
dmacfg.rx_max_burst = DMA_SLAVE_MAXBURST_DEFAULT;
ret = hal_qspi_master_dma_config(&qspi->handle, &dmacfg);
if (ret) {
pr_err("qspi dma config failed.\n");