v1.0.3

bsp/peripheral/codec/tlv320aic3101/tlv320aic3101.h

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2023-2024, ArtInChip Technology Co., Ltd
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Authors: dwj <weijie.ding@artinchip.com>
+ */
+
+#ifndef __DRV_TLV320AIC3101_H__
+#define __DRV_TLV320AIC3101_H__
+
+#include "codec.h"
+#include "aic_common.h"
+
+#define TLV320_PAGE0_PSR                0
+#define TLV320_PAGE0_SRR                1
+#define TLV320_PAGE0_CSRSR              2
+#define TLV320_PAGE0_CDPSR              7
+#define TLV320_PAGE0_ASDICRA            8
+#define TLV320_PAGE0_ASDICRB            9
+#define TLV320_PAGE0_ASDICRC            10
+#define TLV320_PAGE0_LADCPGCR           15
+#define TLV320_PAGE0_RADCPGCR           16
+#define TLV320_PAGE0_MIC1LPLADC         19
+#define TLV320_PAGE0_MIC1RPLADC         21
+#define TLV320_PAGE0_MIC1RPRADC         22
+#define TLV320_PAGE0_MIC1LPRADC         24
+#define TLV320_PAGE0_MICBIAS            25
+#define TLV320_PAGE0_DACPODCR           37
+#define TLV320_PAGE0_DACOSCR            41
+#define TLV320_PAGE0_LDACDVCR           43
+#define TLV320_PAGE0_RDACDVCR           44
+#define TLV320_PAGE0_DACL1L             82
+#define TLV320_PAGE0_DACR1L             85
+#define TLV320_PAGE0_LEFTOL             86
+#define TLV320_PAGE0_DACL1R             89
+#define TLV320_PAGE0_DACR1R             92
+#define TLV320_PAGE0_RIGHTOL            93
+#define TLV320_PAGE0_CR                 101
+#define TLV320_PAGE0_CGCR               102
+
+#endif
+