mirror of
https://gitee.com/Vancouver2017/luban-lite.git
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136 lines
3.2 KiB
C
136 lines
3.2 KiB
C
/*
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* Copyright (c) 2023-2025, ArtInChip Technology Co., Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __BL_UART_H_
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#define __BL_UART_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <rtconfig.h>
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#include <aic_core.h>
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#ifndef AIC_CLK_UART0_FREQ
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#define AIC_CLK_UART0_FREQ 48000000 /* default 48M*/
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#endif
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#ifndef AIC_CLK_UART1_FREQ
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#define AIC_CLK_UART1_FREQ 48000000 /* default 48M*/
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#endif
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#ifndef AIC_CLK_UART2_FREQ
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#define AIC_CLK_UART2_FREQ 48000000 /* default 48M*/
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#endif
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#ifndef AIC_CLK_UART3_FREQ
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#define AIC_CLK_UART3_FREQ 48000000 /* default 48M*/
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#endif
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#ifndef AIC_CLK_UART4_FREQ
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#define AIC_CLK_UART4_FREQ 48000000 /* default 48M*/
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#endif
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#ifndef AIC_CLK_UART5_FREQ
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#define AIC_CLK_UART5_FREQ 48000000 /* default 48M*/
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#endif
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#ifndef AIC_CLK_UART6_FREQ
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#define AIC_CLK_UART6_FREQ 48000000 /* default 48M*/
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#endif
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#ifndef AIC_CLK_UART7_FREQ
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#define AIC_CLK_UART7_FREQ 48000000 /* default 48M*/
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#endif
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#define AIC_UART_RX_MODE_POLL 0
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#define AIC_UART_RX_MODE_INT 1
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#define AIC_UART_RX_MODE_DMA 2
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#ifndef AIC_DEV_UART0_RX_MODE
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#define AIC_DEV_UART0_RX_MODE AIC_UART_RX_MODE_POLL
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#endif
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#ifndef AIC_DEV_UART1_RX_MODE
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#define AIC_DEV_UART1_RX_MODE AIC_UART_RX_MODE_POLL
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#endif
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#ifndef AIC_DEV_UART2_RX_MODE
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#define AIC_DEV_UART2_RX_MODE AIC_UART_RX_MODE_POLL
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#endif
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#ifndef AIC_DEV_UART3_RX_MODE
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#define AIC_DEV_UART3_RX_MODE AIC_UART_RX_MODE_POLL
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#endif
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#ifndef AIC_DEV_UART4_RX_MODE
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#define AIC_DEV_UART4_RX_MODE AIC_UART_RX_MODE_POLL
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#endif
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#ifndef AIC_DEV_UART5_RX_MODE
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#define AIC_DEV_UART5_RX_MODE AIC_UART_RX_MODE_POLL
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#endif
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#ifndef AIC_DEV_UART6_RX_MODE
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#define AIC_DEV_UART6_RX_MODE AIC_UART_RX_MODE_POLL
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#endif
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#ifndef AIC_DEV_UART7_RX_MODE
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#define AIC_DEV_UART7_RX_MODE AIC_UART_RX_MODE_POLL
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#endif
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#ifndef AIC_DEV_UART0_RX_BUFSZ
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#define AIC_DEV_UART0_RX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART1_RX_BUFSZ
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#define AIC_DEV_UART1_RX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART2_RX_BUFSZ
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#define AIC_DEV_UART2_RX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART3_RX_BUFSZ
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#define AIC_DEV_UART3_RX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART4_RX_BUFSZ
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#define AIC_DEV_UART4_RX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART5_RX_BUFSZ
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#define AIC_DEV_UART5_RX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART6_RX_BUFSZ
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#define AIC_DEV_UART6_RX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART7_RX_BUFSZ
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#define AIC_DEV_UART7_RX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART0_TX_BUFSZ
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#define AIC_DEV_UART0_TX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART1_TX_BUFSZ
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#define AIC_DEV_UART1_TX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART2_TX_BUFSZ
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#define AIC_DEV_UART2_TX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART3_TX_BUFSZ
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#define AIC_DEV_UART3_TX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART4_TX_BUFSZ
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#define AIC_DEV_UART4_TX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART5_TX_BUFSZ
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#define AIC_DEV_UART5_TX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART6_TX_BUFSZ
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#define AIC_DEV_UART6_TX_BUFSZ 64
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#endif
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#ifndef AIC_DEV_UART7_TX_BUFSZ
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#define AIC_DEV_UART7_TX_BUFSZ 64
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#endif
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int uart_init(int id);
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int uart_config_update(int id, int baudrate);
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int uart_deinit(int id);
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int uart_getchar(int id);
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int uart_putchar(int id, int c);
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int uart_gets(int id, u8 *buf, int len);
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int uart_puts(int id, u8 *buf, int len);
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int uart_get_cur_baudrate(int id);
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void uart_reset(int id);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __BL_UART_H_ */
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