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https://gitee.com/Vancouver2017/luban-lite.git
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369 lines
19 KiB
C
369 lines
19 KiB
C
#ifndef __USB_IMXRT_REG_H__
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#define __USB_IMXRT_REG_H__
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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#define __I volatile const /*!< Defines 'read only' permissions */
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#define __IO volatile /*!< Defines 'read / write' permissions */
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/* ----------------------------------------------------------------------------
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-- USB Peripheral Access Layer
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---------------------------------------------------------------------------- */
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/*!
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* @addtogroup USB_Peripheral_Access_Layer USB Peripheral Access Layer
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* @{
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*/
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/** USB - Register Layout Typedef */
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// typedef struct {
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// __I uint32_t ID; /**< Identification register, offset: 0x0 */
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// __I uint32_t HWGENERAL; /**< Hardware General, offset: 0x4 */
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// __I uint32_t HWHOST; /**< Host Hardware Parameters, offset: 0x8 */
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// __I uint32_t HWDEVICE; /**< Device Hardware Parameters, offset: 0xC */
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// __I uint32_t HWTXBUF; /**< TX Buffer Hardware Parameters, offset: 0x10 */
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// __I uint32_t HWRXBUF; /**< RX Buffer Hardware Parameters, offset: 0x14 */
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// uint8_t RESERVED_0[104];
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// __IO uint32_t GPTIMER0LD; /**< General Purpose Timer #0 Load, offset: 0x80 */
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// __IO uint32_t GPTIMER0CTRL; /**< General Purpose Timer #0 Controller, offset: 0x84 */
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// __IO uint32_t GPTIMER1LD; /**< General Purpose Timer #1 Load, offset: 0x88 */
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// __IO uint32_t GPTIMER1CTRL; /**< General Purpose Timer #1 Controller, offset: 0x8C */
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// __IO uint32_t SBUSCFG; /**< System Bus Config, offset: 0x90 */
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// uint8_t RESERVED_1[108];
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// __I uint8_t CAPLENGTH; /**< Capability Registers Length, offset: 0x100 */
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// uint8_t RESERVED_2[1];
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// __I uint16_t HCIVERSION; /**< Host Controller Interface Version, offset: 0x102 */
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// __I uint32_t HCSPARAMS; /**< Host Controller Structural Parameters, offset: 0x104 */
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// __I uint32_t HCCPARAMS; /**< Host Controller Capability Parameters, offset: 0x108 */
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// uint8_t RESERVED_3[20];
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// __I uint16_t DCIVERSION; /**< Device Controller Interface Version, offset: 0x120 */
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// uint8_t RESERVED_4[2];
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// __I uint32_t DCCPARAMS; /**< Device Controller Capability Parameters, offset: 0x124 */
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// uint8_t RESERVED_5[24];
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// __IO uint32_t USBCMD; /**< USB Command Register, offset: 0x140 */
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// __IO uint32_t USBSTS; /**< USB Status Register, offset: 0x144 */
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// __IO uint32_t USBINTR; /**< Interrupt Enable Register, offset: 0x148 */
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// __IO uint32_t FRINDEX; /**< USB Frame Index, offset: 0x14C */
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// uint8_t RESERVED_6[4];
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// union { /* offset: 0x154 */
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// __IO uint32_t DEVICEADDR; /**< Device Address, offset: 0x154 */
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// __IO uint32_t PERIODICLISTBASE; /**< Frame List Base Address, offset: 0x154 */
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// };
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// union { /* offset: 0x158 */
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// __IO uint32_t ASYNCLISTADDR; /**< Next Asynch. Address, offset: 0x158 */
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// __IO uint32_t ENDPTLISTADDR; /**< Endpoint List Address, offset: 0x158 */
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// };
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// uint8_t RESERVED_7[4];
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// __IO uint32_t BURSTSIZE; /**< Programmable Burst Size, offset: 0x160 */
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// __IO uint32_t TXFILLTUNING; /**< TX FIFO Fill Tuning, offset: 0x164 */
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// uint8_t RESERVED_8[16];
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// __IO uint32_t ENDPTNAK; /**< Endpoint NAK, offset: 0x178 */
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// __IO uint32_t ENDPTNAKEN; /**< Endpoint NAK Enable, offset: 0x17C */
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// __I uint32_t CONFIGFLAG; /**< Configure Flag Register, offset: 0x180 */
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// __IO uint32_t PORTSC1; /**< Port Status & Control, offset: 0x184 */
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// uint8_t RESERVED_9[28];
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// __IO uint32_t OTGSC; /**< On-The-Go Status & control, offset: 0x1A4 */
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// __IO uint32_t USBMODE; /**< USB Device Mode, offset: 0x1A8 */
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// __IO uint32_t ENDPTSETUPSTAT; /**< Endpoint Setup Status, offset: 0x1AC */
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// __IO uint32_t ENDPTPRIME; /**< Endpoint Prime, offset: 0x1B0 */
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// __IO uint32_t ENDPTFLUSH; /**< Endpoint Flush, offset: 0x1B4 */
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// __I uint32_t ENDPTSTAT; /**< Endpoint Status, offset: 0x1B8 */
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// __IO uint32_t ENDPTCOMPLETE; /**< Endpoint Complete, offset: 0x1BC */
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// __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */
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// __IO uint32_t ENDPTCTRL[7]; /**< Endpoint Control 1..Endpoint Control 7, array offset: 0x1C4, array step: 0x4 */
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// } USB_Type;
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/*! @brief The maximum value of ISO type maximum packet size for HS in USB specification 2.0 */
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#define USB_DEVICE_MAX_HS_ISO_MAX_PACKET_SIZE (1024U)
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/*! @brief The maximum value of interrupt type maximum packet size for HS in USB specification 2.0 */
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#define USB_DEVICE_MAX_HS_INTERUPT_MAX_PACKET_SIZE (1024U)
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/*! @brief The maximum value of bulk type maximum packet size for HS in USB specification 2.0 */
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#define USB_DEVICE_MAX_HS_BULK_MAX_PACKET_SIZE (512U)
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/*! @brief The maximum value of control type maximum packet size for HS in USB specification 2.0 */
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#define USB_DEVICE_MAX_HS_CONTROL_MAX_PACKET_SIZE (64U)
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#define USB_DEVICE_MAX_TRANSFER_PRIME_TIMES \
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(10000000U) /* The max prime times of EPPRIME, if still doesn't take effect, means status has been reset*/
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/* Device QH */
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#define USB_DEVICE_EHCI_QH_POINTER_MASK (0xFFFFFFC0U)
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#define USB_DEVICE_EHCI_QH_MULT_MASK (0xC0000000U)
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#define USB_DEVICE_EHCI_QH_ZLT_MASK (0x20000000U)
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#define USB_DEVICE_EHCI_QH_MAX_PACKET_SIZE_MASK (0x07FF0000U)
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#define USB_DEVICE_EHCI_QH_MAX_PACKET_SIZE (0x00000800U)
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#define USB_DEVICE_EHCI_QH_IOS_MASK (0x00008000U)
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/* Device DTD */
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#define USB_DEVICE_ECHI_DTD_POINTER_MASK (0xFFFFFFE0U)
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#define USB_DEVICE_ECHI_DTD_TERMINATE_MASK (0x00000001U)
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#define USB_DEVICE_ECHI_DTD_PAGE_MASK (0xFFFFF000U)
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#define USB_DEVICE_ECHI_DTD_PAGE_OFFSET_MASK (0x00000FFFU)
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#define USB_DEVICE_ECHI_DTD_PAGE_BLOCK (0x00001000U)
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#define USB_DEVICE_ECHI_DTD_TOTAL_BYTES_MASK (0x7FFF0000U)
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#define USB_DEVICE_ECHI_DTD_TOTAL_BYTES (0x00004000U)
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#define USB_DEVICE_ECHI_DTD_IOC_MASK (0x00008000U)
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#define USB_DEVICE_ECHI_DTD_MULTIO_MASK (0x00000C00U)
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#define USB_DEVICE_ECHI_DTD_STATUS_MASK (0x000000FFU)
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#define USB_DEVICE_EHCI_DTD_STATUS_ERROR_MASK (0x00000068U)
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#define USB_DEVICE_ECHI_DTD_STATUS_ACTIVE (0x00000080U)
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#define USB_DEVICE_ECHI_DTD_STATUS_HALTED (0x00000040U)
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#define USB_DEVICE_ECHI_DTD_STATUS_DATA_BUFFER_ERROR (0x00000020U)
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#define USB_DEVICE_ECHI_DTD_STATUS_TRANSACTION_ERROR (0x00000008U)
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#define USB_DESCRIPTOR_ENDPOINT_MAXPACKETSIZE_MULT_TRANSACTIONS_MASK (0x1800u)
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#define USB_DESCRIPTOR_ENDPOINT_MAXPACKETSIZE_MULT_TRANSACTIONS_SHFIT (11U)
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/*! @brief Define current endian */
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#ifndef ENDIANNESS
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#define ENDIANNESS USB_LITTLE_ENDIAN
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#endif
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/*
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* The following MACROs (USB_GLOBAL, USB_BDT, USB_RAM_ADDRESS_ALIGNMENT, etc) are only used for USB device stack.
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* The USB device global variables are put into the section m_usb_global and m_usb_bdt
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* by using the MACRO USB_GLOBAL and USB_BDT. In this way, the USB device
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* global variables can be linked into USB dedicated RAM by USB_STACK_USE_DEDICATED_RAM.
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* The MACRO USB_STACK_USE_DEDICATED_RAM is used to decide the USB stack uses dedicated RAM or not. The value of
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* the macro can be set as 0, USB_STACK_DEDICATED_RAM_TYPE_BDT_GLOBAL, or USB_STACK_DEDICATED_RAM_TYPE_BDT.
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* The MACRO USB_STACK_DEDICATED_RAM_TYPE_BDT_GLOBAL means USB device global variables, including USB_BDT and
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* USB_GLOBAL, are put into the USB dedicated RAM. This feature can only be enabled when the USB dedicated RAM
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* is not less than 2K Bytes.
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* The MACRO USB_STACK_DEDICATED_RAM_TYPE_BDT means USB device global variables, only including USB_BDT, are put
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* into the USB dedicated RAM, the USB_GLOBAL will be put into .bss section. This feature is used for some SOCs,
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* the USB dedicated RAM size is not more than 512 Bytes.
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*/
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#if defined(__ICCARM__)
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#define USB_WEAK_VAR __attribute__((weak))
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#define USB_WEAK_FUN __attribute__((weak))
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/* disable misra 19.13 */
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_Pragma("diag_suppress=Pm120")
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#define USB_ALIGN_PRAGMA(x) _Pragma(#x)
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_Pragma("diag_default=Pm120")
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#define USB_RAM_ADDRESS_ALIGNMENT(n) USB_ALIGN_PRAGMA(data_alignment = n)
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_Pragma("diag_suppress=Pm120")
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#define USB_LINK_SECTION_PART(str) _Pragma(#str)
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#define USB_LINK_DMA_INIT_DATA(sec) USB_LINK_SECTION_PART(location = #sec)
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#define USB_LINK_USB_GLOBAL _Pragma("location = \"m_usb_global\"")
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#define USB_LINK_USB_BDT _Pragma("location = \"m_usb_bdt\"")
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#define USB_LINK_USB_GLOBAL_BSS
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#define USB_LINK_USB_BDT_BSS
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_Pragma("diag_default=Pm120")
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#define USB_LINK_DMA_NONINIT_DATA _Pragma("location = \"m_usb_dma_noninit_data\"")
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#define USB_LINK_NONCACHE_NONINIT_DATA _Pragma("location = \"NonCacheable\"")
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#elif defined(__CC_ARM) || (defined(__ARMCC_VERSION))
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#define USB_WEAK_VAR __attribute__((weak))
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#define USB_WEAK_FUN __attribute__((weak))
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#define USB_RAM_ADDRESS_ALIGNMENT(n) __attribute__((aligned(n)))
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#define USB_LINK_DMA_INIT_DATA(sec) __attribute__((section(#sec)))
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#if defined(__CC_ARM)
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#define USB_LINK_USB_GLOBAL __attribute__((section("m_usb_global"))) __attribute__((zero_init))
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#else
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#define USB_LINK_USB_GLOBAL __attribute__((section(".bss.m_usb_global")))
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#endif
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#if defined(__CC_ARM)
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#define USB_LINK_USB_BDT __attribute__((section("m_usb_bdt"))) __attribute__((zero_init))
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#else
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#define USB_LINK_USB_BDT __attribute__((section(".bss.m_usb_bdt")))
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#endif
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#define USB_LINK_USB_GLOBAL_BSS
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#define USB_LINK_USB_BDT_BSS
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#if defined(__CC_ARM)
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#define USB_LINK_DMA_NONINIT_DATA __attribute__((section("m_usb_dma_noninit_data"))) __attribute__((zero_init))
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#else
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#define USB_LINK_DMA_NONINIT_DATA __attribute__((section(".bss.m_usb_dma_noninit_data")))
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#endif
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#if defined(__CC_ARM)
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#define USB_LINK_NONCACHE_NONINIT_DATA __attribute__((section("NonCacheable"))) __attribute__((zero_init))
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#else
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#define USB_LINK_NONCACHE_NONINIT_DATA __attribute__((section(".bss.NonCacheable")))
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#endif
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#elif defined(__GNUC__)
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#define USB_WEAK_VAR __attribute__((weak))
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#define USB_WEAK_FUN __attribute__((weak))
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#define USB_RAM_ADDRESS_ALIGNMENT(n) __attribute__((aligned(n)))
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#define USB_LINK_DMA_INIT_DATA(sec) __attribute__((section(#sec)))
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#define USB_LINK_USB_GLOBAL __attribute__((section("m_usb_global, \"aw\", %nobits @")))
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#define USB_LINK_USB_BDT __attribute__((section("m_usb_bdt, \"aw\", %nobits @")))
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#define USB_LINK_USB_GLOBAL_BSS
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#define USB_LINK_USB_BDT_BSS
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#define USB_LINK_DMA_NONINIT_DATA __attribute__((section("m_usb_dma_noninit_data, \"aw\", %nobits @")))
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#define USB_LINK_NONCACHE_NONINIT_DATA __attribute__((section("NonCacheable, \"aw\", %nobits @")))
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#elif (defined(__DSC__) && defined(__CW__))
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#define MAX(a, b) (((a) > (b)) ? (a) : (b))
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#define USB_WEAK_VAR __attribute__((weak))
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#define USB_WEAK_FUN __attribute__((weak))
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#define USB_RAM_ADDRESS_ALIGNMENT(n) __attribute__((aligned(n)))
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#define USB_LINK_USB_BDT_BSS
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#define USB_LINK_USB_GLOBAL_BSS
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#else
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#error The tool-chain is not supported.
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#endif
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#if (defined(USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE)) || \
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(defined(USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE))
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#define USB_DMA_DATA_NONINIT_SUB USB_LINK_DMA_NONINIT_DATA
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#define USB_DMA_DATA_INIT_SUB USB_LINK_DMA_INIT_DATA(m_usb_dma_init_data)
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#define USB_CONTROLLER_DATA USB_LINK_NONCACHE_NONINIT_DATA
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#else
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#if (defined(DATA_SECTION_IS_CACHEABLE) && (DATA_SECTION_IS_CACHEABLE))
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#define USB_DMA_DATA_NONINIT_SUB USB_LINK_NONCACHE_NONINIT_DATA
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#define USB_DMA_DATA_INIT_SUB USB_LINK_DMA_INIT_DATA(NonCacheable.init)
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#define USB_CONTROLLER_DATA USB_LINK_NONCACHE_NONINIT_DATA
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#else
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#define USB_DMA_DATA_NONINIT_SUB
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#define USB_DMA_DATA_INIT_SUB
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#define USB_CONTROLLER_DATA USB_LINK_USB_GLOBAL
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#endif
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#endif
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/*! @brief Endpoint initialization structure */
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typedef struct _usb_device_endpoint_init_struct
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{
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uint16_t maxPacketSize; /*!< Endpoint maximum packet size */
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uint8_t endpointAddress; /*!< Endpoint address*/
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uint8_t transferType; /*!< Endpoint transfer type*/
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uint8_t zlt; /*!< ZLT flag*/
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uint8_t interval; /*!< Endpoint interval*/
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} usb_device_endpoint_init_struct_t;
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typedef struct _usb_device_ehci_qh_struct
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{
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union
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{
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volatile uint32_t capabilttiesCharacteristics;
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struct
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{
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volatile uint32_t reserved1 : 15;
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volatile uint32_t ios : 1;
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volatile uint32_t maxPacketSize : 11;
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volatile uint32_t reserved2 : 2;
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volatile uint32_t zlt : 1;
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volatile uint32_t mult : 2;
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} capabilttiesCharacteristicsBitmap;
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} capabilttiesCharacteristicsUnion;
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volatile uint32_t currentDtdPointer;
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volatile uint32_t nextDtdPointer;
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union
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{
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volatile uint32_t dtdToken;
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struct
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{
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volatile uint32_t status : 8;
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volatile uint32_t reserved1 : 2;
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volatile uint32_t multiplierOverride : 2;
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volatile uint32_t reserved2 : 3;
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volatile uint32_t ioc : 1;
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volatile uint32_t totalBytes : 15;
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volatile uint32_t reserved3 : 1;
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} dtdTokenBitmap;
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} dtdTokenUnion;
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volatile uint32_t bufferPointerPage[5];
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volatile uint32_t reserved1;
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uint32_t setupBuffer[2];
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uint32_t setupBufferBack[2];
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union
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{
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uint32_t endpointStatus;
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struct
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{
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uint32_t isOpened : 1;
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uint32_t zlt : 1;
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uint32_t : 30;
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} endpointStatusBitmap;
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} endpointStatusUnion;
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uint32_t reserved2;
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} usb_device_ehci_qh_struct_t;
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typedef struct _usb_device_ehci_dtd_struct
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{
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volatile uint32_t nextDtdPointer;
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union
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{
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volatile uint32_t dtdToken;
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struct
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{
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volatile uint32_t status : 8;
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volatile uint32_t reserved1 : 2;
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volatile uint32_t multiplierOverride : 2;
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volatile uint32_t reserved2 : 3;
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volatile uint32_t ioc : 1;
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volatile uint32_t totalBytes : 15;
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volatile uint32_t reserved3 : 1;
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} dtdTokenBitmap;
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} dtdTokenUnion;
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volatile uint32_t bufferPointerPage[5];
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union
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{
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volatile uint32_t reserved;
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struct
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{
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uint32_t originalBufferOffest : 12;
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uint32_t originalBufferLength : 19;
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uint32_t dtdInvalid : 1;
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} originalBufferInfo;
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} reservedUnion;
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} usb_device_ehci_dtd_struct_t;
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/*! @brief EHCI state structure */
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typedef struct _usb_device_ehci_state_struct
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{
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USB_Type *registerBase; /*!< The base address of the register */
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#if (defined(USB_DEVICE_CONFIG_LOW_POWER_MODE) && (USB_DEVICE_CONFIG_LOW_POWER_MODE > 0U))
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USBPHY_Type *registerPhyBase; /*!< The base address of the PHY register */
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#if (defined(FSL_FEATURE_SOC_USBNC_COUNT) && (FSL_FEATURE_SOC_USBNC_COUNT > 0U))
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USBNC_Type *registerNcBase; /*!< The base address of the USBNC register */
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#endif
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#endif
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usb_device_ehci_qh_struct_t *qh; /*!< The QH structure base address */
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usb_device_ehci_dtd_struct_t *dtd; /*!< The DTD structure base address */
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usb_device_ehci_dtd_struct_t *dtdFree; /*!< The idle DTD list head */
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usb_device_ehci_dtd_struct_t
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*dtdHead[USB_DEVICE_ENDPOINTS * 2]; /*!< The transferring DTD list head for each endpoint */
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usb_device_ehci_dtd_struct_t
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*dtdTail[USB_DEVICE_ENDPOINTS * 2]; /*!< The transferring DTD list tail for each endpoint */
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uint8_t dtdCount; /*!< The idle DTD node count */
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uint8_t endpointCount; /*!< The endpoint number of EHCI */
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uint8_t isResetting; /*!< Whether a PORT reset is occurring or not */
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uint8_t controllerId; /*!< Controller ID */
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uint8_t speed; /*!< Current speed of EHCI */
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uint8_t isSuspending; /*!< Is suspending of the PORT */
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} usb_device_ehci_state_struct_t;
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/*! @brief USB error code */
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typedef enum _usb_status
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{
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kStatus_USB_Success = 0x00U, /*!< Success */
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kStatus_USB_Error, /*!< Failed */
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kStatus_USB_Busy, /*!< Busy */
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kStatus_USB_InvalidHandle, /*!< Invalid handle */
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kStatus_USB_InvalidParameter, /*!< Invalid parameter */
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kStatus_USB_InvalidRequest, /*!< Invalid request */
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kStatus_USB_ControllerNotFound, /*!< Controller cannot be found */
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kStatus_USB_InvalidControllerInterface, /*!< Invalid controller interface */
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kStatus_USB_NotSupported, /*!< Configuration is not supported */
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kStatus_USB_Retry, /*!< Enumeration get configuration retry */
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kStatus_USB_TransferStall, /*!< Transfer stalled */
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kStatus_USB_TransferFailed, /*!< Transfer failed */
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kStatus_USB_AllocFail, /*!< Allocation failed */
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kStatus_USB_LackSwapBuffer, /*!< Insufficient swap buffer for KHCI */
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kStatus_USB_TransferCancel, /*!< The transfer cancelled */
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kStatus_USB_BandwidthFail, /*!< Allocate bandwidth failed */
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kStatus_USB_MSDStatusFail, /*!< For MSD, the CSW status means fail */
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kStatus_USB_EHCIAttached,
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kStatus_USB_EHCIDetached,
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kStatus_USB_DataOverRun, /*!< The amount of data returned by the endpoint exceeded
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either the size of the maximum data packet allowed
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from the endpoint or the remaining buffer size. */
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} usb_status_t;
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#endif /* __USB_IMXRT_REG_H__ */
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/* End of file ***************************************************************************/
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