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V1.0.6

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This commit is contained in:
刘可亮
2024-09-03 11:16:08 +08:00
parent cf270df8d6
commit 803cac77d5
2931 changed files with 614364 additions and 31222 deletions
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74
target/d13x/common/Kconfig.board
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@@ -252,8 +252,11 @@ config AIC_USING_CAP5
default n
select AIC_CAP_DRV
source "bsp/artinchip/drv/cap/Kconfig"
endmenu
#---------------------------
# CAN device global option
#---------------------------
@@ -287,6 +290,10 @@ source "bsp/artinchip/drv/cir/Kconfig"
# usb device global option
#---------------------------
config AIC_USB_OTG_DRV
bool
default n
config AIC_USING_USB0
bool "Using Usb0"
default n
@@ -305,6 +312,7 @@ if AIC_USING_USB0
bool "OTG"
select AIC_USB_DEVICE_DRV
select AIC_USB_HOST_EHCI_DRV
select AIC_USB_OTG_DRV
endchoice
endif
@@ -650,6 +658,21 @@ config AIC_USING_AUDIO
source "bsp/artinchip/drv/audio/Kconfig"
#---------------------------
# TOUCH device global option
#---------------------------
if KERNEL_BAREMETAL
config AIC_USING_TOUCH
bool "Using Touch"
default n
select AIC_TOUCH_DRV
source "bsp/artinchip/drv_bare/touch/Kconfig"
endif
#---------------------------
# xxx device global option
#---------------------------
@@ -923,6 +946,33 @@ config AIC_INTERRUPTSTACK_SIZE
range 0 AIC_SRAM_TOTAL_SIZE
default 4096
# 6. Support seconed Flash
menu "Support another Flash"
choice
prompt "Number of Flash"
default AIC_FLASH_NUM_ONE
help
Whether support another flash
config AIC_FLASH_NUM_ONE
bool "only 1 flash"
config AIC_FLASH_NUM_TWO
bool "support 2 flashes"
endchoice
choice
prompt "Seconed Flash type"
depends on AIC_FLASH_NUM_TWO
default AIC_SECONED_FLASH_NOR
help
Type of seconed Flash
config AIC_SECONED_FLASH_NOR
bool "norflash"
config AIC_SECONED_FLASH_NAND
bool "nandflash"
endchoice
endmenu
endmenu
#---------------------------
@@ -975,18 +1025,42 @@ config AIC_USING_CLK_OUT0
bool "Enable CLK_OUT0"
default n
if AIC_USING_CLK_OUT0
config AIC_CLK_OUT0_FREQ
int "Clk CLK_OUT0 frequence"
default 25000000
endif
config AIC_USING_CLK_OUT1
bool "Enable CLK_OUT1"
default n
if AIC_USING_CLK_OUT1
config AIC_CLK_OUT1_FREQ
int "Clk CLK_OUT1 frequence"
default 24000000
endif
config AIC_USING_CLK_OUT2
bool "Enable CLK_OUT2"
default n
if AIC_USING_CLK_OUT2
config AIC_CLK_OUT2_FREQ
int "Clk CLK_OUT2 frequence"
default 25000000
endif
config AIC_USING_CLK_OUT3
bool "Enable CLK_OUT3"
default n
if AIC_USING_CLK_OUT3
config AIC_CLK_OUT2_FREQ
int "Clk CLK_OUT3 frequence"
default 25000000
endif
endmenu
#---------------------------

2
target/d13x/demo68-nor/board.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, ArtInChip Technology Co., Ltd
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*

2
target/d13x/demo68-nor/include/board.h
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, ArtInChip Technology Co., Ltd
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*

BIN
target/d13x/demo68-nor/pack/bootloader.bin
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Binary file not shown.

9
target/d13x/demo68-nor/pack/env.txt
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@@ -1,6 +1,13 @@
osAB_next=A
osAB_now=A
rodataAB_next=A
rodataAB_now=A
dataAB_next=A
dataAB_now=A
upgrade_available=0
bootlimit=5
bootcount=0
rodata_partname=blk_rodata
rodata_partname_r=blk_rodata_r
data_partname=blk_data
data_partname_r=blk_data_r

53
target/d13x/demo68-nor/pack/image_cfg.json
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@@ -5,11 +5,9 @@
"spl": { "size": "256k" },
"env": { "size": "128k" },
"env_r": { "size": "128k" },
"os": { "size": "1m" },
"os_r": { "size": "1m" },
"rodata": { "size": "3m" },
"rodata_r": { "size": "3m" },
"data": { "size": "7m" }
"os": { "size": "2m" },
"rodata": { "size": "10m" },
"data": { "size": "1m" }
},
},
"image": {
@@ -23,10 +21,15 @@
}
},
"updater": { // Image writer which is downloaded to RAM by USB
"psram": {
"file": "usbupg-psram-init.aic",
"attr": ["required", "run"],
"ram": "0x30044000"
},
"spl": {
"file": "bootloader.aic",
"attr": ["required", "run"],
"ram": "0x30080000"
"ram": "0x40100000"
},
},
"target": { // Image components which will be burn to device's partitions
@@ -57,27 +60,45 @@
},
},
},
"temporary": { // Pre-proccess to generate image components from raw data
"aicboot": {
"bootloader.aic": {
"pre-process": { // Pre-proccess to generate image components from raw data
"aicimage": { // Create aic boot image
"usbupg-psram-init.aic": { // No loader, only PreBootProgram to initialize PSRAM
"head_ver": "0x00010001",
"loader": {
"file": "bootloader.bin",
"load address": "0x30080000",
"entry point": "0x30080100",
},
"resource": {
"private": "pbp_cfg.bin",
"pbp": "d13x.pbp",
},
},
"pbp_ext.aic": {
"head_ver": "0x00010001",
"resource": {
"pbp": "d13x.pbp",
"private": "pbp_cfg.bin",
},
// combine to use with loader.aic
"with_ext": "true",
},
"loader.aic": {
"head_ver": "0x00010001",
"loader": {
"file": "bootloader.bin",
"load address": "0x40200000",
"entry point": "0x40200100", // 256 byte aic header
},
"resource": {
"private": "pbp_cfg.bin",
},
},
},
"itb": {
"concatenate": { // cat files in order
"bootloader.aic": ["pbp_ext.aic", "loader.aic"],
},
"itb": { // Create itb image from its
"d13x_os.itb": {
"its": "d13x_os.its"
},
},
"uboot_env": {
"uboot_env": { // Create env data from txt
"env.bin": {
"file": "env.txt",
"size": "4096",

10
target/d13x/demo68-nor/pack/ota-subimgs.cfg
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@@ -1,2 +1,8 @@
d13x_os.itb
rodata.fatfs
[image]
size = "";
version = "1.0.0";
[file]
ota_info.bin:file;
d13x_os.itb:os;
rodata.fatfs:rodata;

29
target/d13x/demo68-nor/pinmux.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, ArtInChip Technology Co., Ltd
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -365,30 +365,9 @@ struct aic_pinmux aic_pinmux_config[] = {
#ifdef AIC_USING_GPAI7
{2, PIN_PULL_DIS, 3, "PA.7"},
#endif
/* ctp rst & irq */
#ifdef AIC_TOUCH_PANEL_AXS15260
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_AXS15260_RST_PIN},
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_AXS15260_INT_PIN},
#endif
#ifdef AIC_TOUCH_PANEL_CST3240
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_CST3240_RST_PIN},
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_CST3240_INT_PIN},
#endif
#ifdef AIC_TOUCH_PANEL_FT7411
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_FT7411_RST_PIN},
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_FT7411_INT_PIN},
#endif
#ifdef AIC_TOUCH_PANEL_GSL1680
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_GSL1680_RST_PIN},
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_GSL1680_INT_PIN},
#endif
#ifdef AIC_TOUCH_PANEL_GT911
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_GT911_RST_PIN},
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_GT911_INT_PIN},
#endif
#ifdef AIC_TOUCH_PANEL_ST16XX
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_ST16XX_RST_PIN},
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_ST16XX_INT_PIN},
#ifdef AIC_USING_CTP
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_RST_PIN},
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_INT_PIN},
#endif
};

2
target/d13x/demo68-nor/sys_clk.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, ArtInChip Technology Co., Ltd
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*

12
target/d13x/demo88-nand/board.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, ArtInChip Technology Co., Ltd
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -125,9 +125,6 @@ void aic_memheap_free(int type, void *rmem)
*/
void rt_hw_board_init(void)
{
aic_board_sysclk_init();
aic_board_pinmux_init();
#ifdef RT_USING_HEAP
rt_system_heap_init((void *)&__heap_start, (void *)&__heap_end);
#if (!defined(QEMU_RUN) && defined(RT_USING_MEMHEAP))
@@ -135,6 +132,9 @@ void rt_hw_board_init(void)
#endif
#endif
aic_board_sysclk_init();
aic_board_pinmux_init();
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
@@ -183,17 +183,19 @@ const struct dfs_mount_tbl mount_table[] = {
#ifdef LPKG_RAMDISK_TYPE_INITDATA
{"ramdisk0", "/ram", "elm", 0, 0, 0},
#endif
#ifndef AIC_AB_SYSTEM_INTERFACE
#if (defined(AIC_USING_FS_IMAGE_TYPE_FATFS_FOR_0) || defined(AIC_USING_FS_IMAGE_TYPE_FATFS_FOR_1))
{"blk_rodata", "/rodata", "elm", 0, 0, 0},
{"blk_data", "/data", "elm", 0, 0, 1},
#endif
#endif
#ifdef LPKG_USING_DFS_UFFS
{"data", "/data", "uffs", 0, 0, 1},
#endif
#ifdef AIC_USING_SDMC1
{"sd0", "/sdcard", "elm", 0, 0, 0},
#endif
#if (defined(AIC_USING_USB0_HOST) || defined(AIC_USING_USB1_HOST))
#if (defined(AIC_USING_USB0_HOST) || defined(AIC_USING_USB0_OTG) || defined(AIC_USING_USB1_HOST))
{"udisk", "/udisk", "elm", 0, 0, 0},
#endif
{0}

BIN
target/d13x/demo88-nand/pack/bootloader.bin
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Binary file not shown.

9
target/d13x/demo88-nand/pack/env.txt
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@@ -1,6 +1,13 @@
osAB_next=A
osAB_now=A
rodataAB_next=A
rodataAB_now=A
dataAB_next=A
dataAB_now=A
upgrade_available=0
bootlimit=5
bootcount=0
rodata_partname=blk_rodata
rodata_partname_r=blk_rodata_r
data_partname=blk_data
data_partname_r=blk_data_r

61
target/d13x/demo88-nand/pack/image_cfg.json
View File

@@ -10,7 +10,13 @@
"rodata": { "size": "12m" },
"rodata_r": { "size": "12m" },
"data": {
"size": "50m",
"size": "40m",
"nftl": { // Volume in NFTL device
"data": { "size": "-" },
},
},
"data_r": {
"size": "40m",
"nftl": { // Volume in NFTL device
"data": { "size": "-" },
},
@@ -32,10 +38,15 @@
}
},
"updater": { // Image writer which is downloaded to RAM by USB
"psram": {
"file": "usbupg-psram-init.aic",
"attr": ["required", "run"],
"ram": "0x30044000"
},
"spl": {
"file": "bootloader.aic",
"attr": ["required", "run"],
"ram": "0x30100000"
"ram": "0x40100000"
},
},
"target": { // Image components which will be burn to device's partitions
@@ -66,32 +77,50 @@
},
},
},
"temporary": { // Pre-proccess to generate image components from raw data
"aicboot": {
"bootloader.aic": {
"pre-process": { // Pre-proccess to generate image components from raw data
"aicimage": { // Create aic boot image
"usbupg-psram-init.aic": { // No loader, only PreBootProgram to initialize PSRAM
"head_ver": "0x00010001",
"loader": {
"file": "bootloader.bin",
"load address": "0x30100000",
"entry point": "0x30100100",
},
"resource": {
"private": "pbp_cfg.bin",
"pbp": "d13x.pbp",
},
},
"pbp_ext.aic": {
"head_ver": "0x00010001",
"resource": {
"pbp": "d13x.pbp",
"private": "pbp_cfg.bin",
},
// combine to use with loader.aic
"with_ext": "true",
},
"loader.aic": {
"head_ver": "0x00010001",
"loader": {
"file": "bootloader.bin",
"load address": "0x40200000",
"entry point": "0x40200100", // 256 byte aic header
},
"resource": {
"private": "pbp_cfg.bin",
},
},
},
"uboot_env": {
"concatenate": { // cat files in order
"bootloader.aic": ["pbp_ext.aic", "loader.aic"],
},
"itb": { // Create itb image from its
"d13x_os.itb": {
"its": "d13x_os.its"
},
},
"uboot_env": { // Create env data from txt
"env.bin": {
"file": "env.txt",
"size": "4096",
"redundant": "enable",
},
},
"itb": {
"d13x_os.itb": {
"its": "d13x_os.its"
},
},
},
}

11
target/d13x/demo88-nand/pack/ota-subimgs.cfg
View File

@@ -1,2 +1,9 @@
d13x_os.itb
rodata.fatfs
[image]
size = "";
version = "1.0.0";
[file]
ota_info.bin:file;
d13x_os.itb:os;
rodata.fatfs:rodata;
data.fatfs:blk_data;

4
target/d13x/demo88-nand/pack/pbp_cfg.json
View File

@@ -195,9 +195,9 @@
"main": {
"uart_id": "0", // UART0 for log output
"uart_tx_pin_cfg_reg": "0x18700080", // PA0
"uart_tx_pin_cfg_val": "0x035",
"uart_tx_pin_cfg_val": "0x335",
"uart_rx_pin_cfg_reg": "0x18700084", // PA1
"uart_rx_pin_cfg_val": "0x035",
"uart_rx_pin_cfg_val": "0x335",
// "uart_id": "0", // UART0 for log output
// "uart_tx_pin_cfg_reg": "0x18700E88", // PN2

71
target/d13x/demo88-nand/pinmux.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, ArtInChip Technology Co., Ltd
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -9,6 +9,11 @@
#include <aic_core.h>
#include <aic_hal.h>
#include "board.h"
#include <libfdt.h>
#include <of.h>
#include <aic_utils.h>
extern size_t __dtb_pos_f;
struct aic_pinmux
{
@@ -22,7 +27,7 @@ struct aic_pinmux aic_pinmux_config[] = {
#ifdef AIC_USING_UART0
/* uart0 */
{5, PIN_PULL_DIS, 3, "PA.0"},
{5, PIN_PULL_DIS, 3, "PA.1"},
{5, PIN_PULL_UP, 3, "PA.1"},
#ifdef AIC_DEV_UART0_MODE_RS485
{1, PIN_PULL_DIS, 3, AIC_UART0_PA_RS485_CTL_NAME},
#endif
@@ -30,7 +35,7 @@ struct aic_pinmux aic_pinmux_config[] = {
#ifdef AIC_USING_UART1
/* uart1 */
{5, PIN_PULL_DIS, 3, "PD.2"},
{5, PIN_PULL_DIS, 3, "PD.3"},
{5, PIN_PULL_UP, 3, "PD.3"},
#ifdef AIC_DEV_UART1_MODE_RS485
{1, PIN_PULL_DIS, 3, AIC_UART1_PA_RS485_CTL_NAME},
#endif
@@ -39,13 +44,13 @@ struct aic_pinmux aic_pinmux_config[] = {
/* uart2 */
#ifdef AIC_DEV_UART2_MODE_RS485
{5, PIN_PULL_DIS, 3, "PD.4"}, // BT_UART2_TX
{5, PIN_PULL_DIS, 3, "PD.5"}, // BT_UART2_RX
{5, PIN_PULL_UP, 3, "PD.5"}, // BT_UART2_RX
{1, PIN_PULL_DIS, 3, AIC_UART2_PA_RS485_CTL_NAME},
#else
{8, PIN_PULL_DIS, 3, "PA.2"}, // BT_UART2_CTS
{8, PIN_PULL_DIS, 3, "PA.3"}, // BT_UART2_RTS
{5, PIN_PULL_DIS, 3, "PD.4"}, // BT_UART2_TX
{5, PIN_PULL_DIS, 3, "PD.5"}, // BT_UART2_RX
{5, PIN_PULL_UP, 3, "PD.5"}, // BT_UART2_RX
{1, PIN_PULL_DIS, 3, "PD.6"}, // BT_PWR_ON
#endif
#endif
@@ -81,7 +86,7 @@ struct aic_pinmux aic_pinmux_config[] = {
{4, PIN_PULL_DIS, 3, "PA.8"}, // SCK
{4, PIN_PULL_DIS, 3, "PA.9"}, // SDA
#endif
#ifdef AIC_USING_QSPI0
#if defined(AIC_USING_QSPI0) && !defined(AIC_SYSCFG_SIP_FLASH_ENABLE)
/* qspi0 */
{2, PIN_PULL_DIS, 3, "PB.0"},
{2, PIN_PULL_DIS, 3, "PB.1"},
@@ -107,6 +112,24 @@ struct aic_pinmux aic_pinmux_config[] = {
{2, PIN_PULL_UP, 3, "PC.5"},
{2, PIN_PULL_UP, 3, "PC.6"},
#endif
#ifdef AIC_USING_CAP0
{3, PIN_PULL_UP, 3, "PC.6"},
#endif
#ifdef AIC_USING_CAP1
{3, PIN_PULL_UP, 3, "PC.7"},
#endif
#ifdef AIC_USING_CAP2
{3, PIN_PULL_UP, 3, "PC.8"},
#endif
#ifdef AIC_USING_CAP3
{3, PIN_PULL_UP, 3, "PC.9"},
#endif
#ifdef AIC_USING_CAP4
{3, PIN_PULL_UP, 3, "PC.10"},
#endif
#ifdef AIC_USING_CAP5
{3, PIN_PULL_UP, 3, "PC.11"},
#endif
#ifdef AIC_WIRELESS_LAN
{1, PIN_PULL_DIS, 3, "PD.7"}, // WIFI_PWR_ON
#endif
@@ -154,9 +177,19 @@ struct aic_pinmux aic_pinmux_config[] = {
{2, PIN_PULL_DIS, 3, "PE.9"},
/* phy0 reset gpio */
{1, PIN_PULL_DIS, 3, "PE.6"},
/* clk_out2 */
#endif
#ifdef AIC_USING_CLK_OUT0
{6, PIN_PULL_DIS, 3, "PD.13"},
#endif
#ifdef AIC_USING_CLK_OUT1
{2, PIN_PULL_DIS, 3, "PE.11"},
#endif
#ifdef AIC_USING_CLK_OUT2
{2, PIN_PULL_DIS, 3, "PE.10"},
#endif
#ifdef AIC_USING_CLK_OUT3
{7, PIN_PULL_DIS, 3, "PC.6"},
#endif
#ifdef AIC_USING_PWM1
{3, PIN_PULL_DIS, 3, "PE.11"},
//{3, PIN_PULL_DIS, 3, "PE.12"},
@@ -243,6 +276,10 @@ struct aic_pinmux aic_pinmux_config[] = {
#ifdef AIC_USING_GPAI7
{2, PIN_PULL_DIS, 3, "PA.7"},
#endif
#ifdef AIC_USING_CTP
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_RST_PIN},
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_INT_PIN},
#endif
};
void aic_board_pinmux_init(void)
@@ -262,4 +299,24 @@ void aic_board_pinmux_init(void)
hal_gpio_set_bias_pull(g, p, aic_pinmux_config[i].bias);
hal_gpio_set_drive_strength(g, p, aic_pinmux_config[i].drive);
}
#ifndef AIC_BOOTLOADER
struct fdt_header *header;
uint32_t dtb_size;
void *dtb_pos_r;
header = (struct fdt_header *)(&__dtb_pos_f);
if (fdt_magic(header) == FDT_MAGIC)
{
dtb_size = fdt_totalsize(header);
dtb_pos_r = aicos_malloc(0, dtb_size);
aicos_memcpy(dtb_pos_r, (void *)(&__dtb_pos_f), dtb_size);
of_relocate_dtb((unsigned long)dtb_pos_r);
pinmux_fdt_parse();
}
#endif
}

16
target/d13x/demo88-nand/sys_clk.c
View File

@@ -27,7 +27,18 @@ struct aic_sysclk aic_sysclk_config[] = {
{AIC_CLK_AHB0_FREQ, CLK_AHB0, CLK_AXI_AHB_SRC1}, /* 200000000 */
{AIC_CLK_APB0_FREQ, CLK_APB0, CLK_APB0_SRC1}, /* 100000000 */
// {24000000, CLK_APB1, 0},
{25000000, CLK_OUT2, 0},
#ifdef AIC_USING_CLK_OUT0
{AIC_CLK_OUT0_FREQ, CLK_OUT0, 0},
#endif /* AIC_USING_CLK_OUT0 */
#ifdef AIC_USING_CLK_OUT1
{AIC_CLK_OUT1_FREQ, CLK_OUT1, 0},
#endif /* AIC_USING_CLK_OUT1 */
#ifdef AIC_USING_CLK_OUT2
{AIC_CLK_OUT2_FREQ, CLK_OUT2, 0},
#endif /* AIC_USING_CLK_OUT2 */
#ifdef AIC_USING_CLK_OUT3
{AIC_CLK_OUT3_FREQ, CLK_OUT3, 0},
#endif /* AIC_USING_CLK_OUT3 */
};
/*
@@ -66,8 +77,5 @@ void aic_board_sysclk_init(void)
/* Enable sys clk */
hal_clk_enable_deassertrst_iter(CLK_GPIO);
hal_clk_enable_deassertrst_iter(CLK_GTC);
#ifdef AIC_USING_GMAC0
hal_clk_enable_iter(CLK_OUT2);
#endif
}

19
target/d13x/demo88-nor/board.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, ArtInChip Technology Co., Ltd
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -122,9 +122,6 @@ void aic_memheap_free(int type, void *rmem)
*/
void rt_hw_board_init(void)
{
aic_board_sysclk_init();
aic_board_pinmux_init();
#ifdef RT_USING_HEAP
rt_system_heap_init((void *)&__heap_start, (void *)&__heap_end);
#if (!defined(QEMU_RUN) && defined(RT_USING_MEMHEAP))
@@ -132,6 +129,9 @@ void rt_hw_board_init(void)
#endif
#endif
aic_board_sysclk_init();
aic_board_pinmux_init();
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
@@ -167,6 +167,9 @@ static const struct romfs_dirent _mountpoint_root[] =
{ROMFS_DIRENT_DIR, "rodata", RT_NULL, 0},
{ROMFS_DIRENT_DIR, "sdcard", RT_NULL, 0},
{ROMFS_DIRENT_DIR, "udisk", RT_NULL, 0},
#if defined(AIC_FLASH_NUM_TWO)
{ROMFS_DIRENT_DIR, "extra", RT_NULL, 0},
#endif
};
const struct romfs_dirent romfs_root =
{
@@ -194,8 +197,14 @@ const struct dfs_mount_tbl mount_table[] = {
#ifdef AIC_USING_SDMC1
{"sd0", "/sdcard", "elm", 0, 0, 0},
#endif
#if (defined(AIC_USING_USB0_HOST) || defined(AIC_USING_USB1_HOST))
#if (defined(AIC_USING_USB0_HOST) || defined(AIC_USING_USB0_OTG) || defined(AIC_USING_USB1_HOST))
{"udisk", "/udisk", "elm", 0, 0, 0xFF},
#endif
#ifdef AIC_SECONED_FLASH_NOR
{"extra", "/extra", "lfs", 0, 0, 0},
#endif
#ifdef AIC_SECONED_FLASH_NAND
{"blk_extra", "/extra", "elm", 0, 0, 0},
#endif
{0}
};

BIN
target/d13x/demo88-nor/pack/bootloader.bin
View File

Binary file not shown.

9
target/d13x/demo88-nor/pack/env.txt
View File

@@ -1,6 +1,13 @@
osAB_next=A
osAB_now=A
rodataAB_next=A
rodataAB_now=A
dataAB_next=A
dataAB_now=A
upgrade_available=0
bootlimit=5
bootcount=0
rodata_partname=blk_rodata
rodata_partname_r=blk_rodata_r
data_partname=blk_data
data_partname_r=blk_data_r

53
target/d13x/demo88-nor/pack/image_cfg.json
View File

@@ -5,11 +5,9 @@
"spl": { "size": "256k" },
"env": { "size": "128k" },
"env_r": { "size": "128k" },
"os": { "size": "1m" },
"os_r": { "size": "1m" },
"rodata": { "size": "3m" },
"rodata_r": { "size": "3m" },
"data": { "size": "7m" }
"os": { "size": "2m" },
"rodata": { "size": "10m" },
"data": { "size": "1m" }
},
},
"image": {
@@ -23,10 +21,15 @@
}
},
"updater": { // Image writer which is downloaded to RAM by USB
"psram": {
"file": "usbupg-psram-init.aic",
"attr": ["required", "run"],
"ram": "0x30044000"
},
"spl": {
"file": "bootloader.aic",
"attr": ["required", "run"],
"ram": "0x30100000"
"ram": "0x40100000"
},
},
"target": { // Image components which will be burn to device's partitions
@@ -57,27 +60,45 @@
},
},
},
"temporary": { // Pre-proccess to generate image components from raw data
"aicboot": {
"bootloader.aic": {
"pre-process": { // Pre-proccess to generate image components from raw data
"aicimage": { // Create aic boot image
"usbupg-psram-init.aic": { // No loader, only PreBootProgram to initialize PSRAM
"head_ver": "0x00010001",
"loader": {
"file": "bootloader.bin",
"load address": "0x30100000",
"entry point": "0x30100100",
},
"resource": {
"private": "pbp_cfg.bin",
"pbp": "d13x.pbp",
},
},
"pbp_ext.aic": {
"head_ver": "0x00010001",
"resource": {
"pbp": "d13x.pbp",
"private": "pbp_cfg.bin",
},
// combine to use with loader.aic
"with_ext": "true",
},
"loader.aic": {
"head_ver": "0x00010001",
"loader": {
"file": "bootloader.bin",
"load address": "0x40200000",
"entry point": "0x40200100", // 256 byte aic header
},
"resource": {
"private": "pbp_cfg.bin",
},
},
},
"itb": {
"concatenate": { // cat files in order
"bootloader.aic": ["pbp_ext.aic", "loader.aic"],
},
"itb": { // Create itb image from its
"d13x_os.itb": {
"its": "d13x_os.its"
},
},
"uboot_env": {
"uboot_env": { // Create env data from txt
"env.bin": {
"file": "env.txt",
"size": "4096",

10
target/d13x/demo88-nor/pack/ota-subimgs.cfg
View File

@@ -1,2 +1,8 @@
d13x_os.itb
rodata.fatfs
[image]
size = "";
version = "1.0.0";
[file]
ota_info.bin:file;
d13x_os.itb:os;
rodata.fatfs:rodata;

4
target/d13x/demo88-nor/pack/pbp_cfg.json
View File

@@ -195,9 +195,9 @@
"main": {
"uart_id": "0", // UART0 for log output
"uart_tx_pin_cfg_reg": "0x18700080", // PA0
"uart_tx_pin_cfg_val": "0x035",
"uart_tx_pin_cfg_val": "0x335",
"uart_rx_pin_cfg_reg": "0x18700084", // PA1
"uart_rx_pin_cfg_val": "0x035",
"uart_rx_pin_cfg_val": "0x335",
// "uart_id": "0", // UART0 for log output
// "uart_tx_pin_cfg_reg": "0x18700E88", // PN2

60
target/d13x/demo88-nor/pinmux.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, ArtInChip Technology Co., Ltd
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -9,6 +9,11 @@
#include <aic_core.h>
#include <aic_hal.h>
#include "board.h"
#include <libfdt.h>
#include <of.h>
#include <aic_utils.h>
extern size_t __dtb_pos_f;
struct aic_pinmux
{
@@ -22,7 +27,7 @@ struct aic_pinmux aic_pinmux_config[] = {
#ifdef AIC_USING_UART0
/* uart0 */
{5, PIN_PULL_DIS, 3, "PA.0"},
{5, PIN_PULL_DIS, 3, "PA.1"},
{5, PIN_PULL_UP, 3, "PA.1"},
#ifdef AIC_DEV_UART0_MODE_RS485_SIMULATION
{1, PIN_PULL_DIS, 3, AIC_UART0_RTS_NAME},
#endif
@@ -46,7 +51,7 @@ struct aic_pinmux aic_pinmux_config[] = {
#ifdef AIC_USING_UART1
/* uart1 */
{5, PIN_PULL_DIS, 3, "PD.2"},
{5, PIN_PULL_DIS, 3, "PD.3"},
{5, PIN_PULL_UP, 3, "PD.3"},
#ifdef AIC_DEV_UART1_MODE_RS485_SIMULATION
{1, PIN_PULL_DIS, 3, AIC_UART1_RTS_NAME},
#endif
@@ -71,7 +76,7 @@ struct aic_pinmux aic_pinmux_config[] = {
#ifdef AIC_USING_UART2
/* uart2 */
{5, PIN_PULL_DIS, 3, "PD.4"}, // BT_UART2_TX
{5, PIN_PULL_DIS, 3, "PD.5"}, // BT_UART2_RX
{5, PIN_PULL_UP, 3, "PD.5"}, // BT_UART2_RX
#ifdef AIC_DEV_UART2_MODE_RS485_SIMULATION
{1, PIN_PULL_DIS, 3, AIC_UART2_RTS_NAME},
#elif defined AIC_DEV_UART2_MODE_RS232_UNAUTO_FLOW_CTRL
@@ -127,7 +132,7 @@ struct aic_pinmux aic_pinmux_config[] = {
{4, PIN_PULL_DIS, 3, "PA.8"}, // SCK
{4, PIN_PULL_DIS, 3, "PA.9"}, // SDA
#endif
#ifdef AIC_USING_QSPI0
#if defined(AIC_USING_QSPI0) && !defined(AIC_SYSCFG_SIP_FLASH_ENABLE)
/* qspi0 */
{2, PIN_PULL_DIS, 3, "PB.0"},
{2, PIN_PULL_DIS, 3, "PB.1"},
@@ -136,6 +141,15 @@ struct aic_pinmux aic_pinmux_config[] = {
{2, PIN_PULL_DIS, 3, "PB.4"},
{2, PIN_PULL_DIS, 3, "PB.5"},
#endif
#if defined(AIC_USING_QSPI2) && defined(AIC_SYSCFG_SIP_FLASH_ENABLE) && !defined(AIC_USING_SDMC0)
/* qspi2 */
{3, PIN_PULL_DIS, 3, "PB.6"},
{3, PIN_PULL_DIS, 3, "PB.7"},
{3, PIN_PULL_DIS, 3, "PB.8"},
{3, PIN_PULL_DIS, 3, "PB.9"},
{3, PIN_PULL_DIS, 3, "PB.10"},
{3, PIN_PULL_DIS, 3, "PB.11"},
#endif
#ifdef AIC_USING_SDMC0
{2, PIN_PULL_UP, 7, "PB.6"},
{2, PIN_PULL_UP, 7, "PB.7"},
@@ -218,9 +232,19 @@ struct aic_pinmux aic_pinmux_config[] = {
{2, PIN_PULL_DIS, 3, "PE.9"},
/* phy0 reset gpio */
{1, PIN_PULL_DIS, 3, "PE.6"},
/* clk_out2 */
#endif
#ifdef AIC_USING_CLK_OUT0
{6, PIN_PULL_DIS, 3, "PD.13"},
#endif
#ifdef AIC_USING_CLK_OUT1
{2, PIN_PULL_DIS, 3, "PE.11"},
#endif
#ifdef AIC_USING_CLK_OUT2
{2, PIN_PULL_DIS, 3, "PE.10"},
#endif
#ifdef AIC_USING_CLK_OUT3
{7, PIN_PULL_DIS, 3, "PC.6"},
#endif
#ifdef AIC_USING_PWM1
{3, PIN_PULL_DIS, 3, "PE.11"},
//{3, PIN_PULL_DIS, 3, "PE.12"},
@@ -355,6 +379,10 @@ struct aic_pinmux aic_pinmux_config[] = {
#ifdef AIC_USING_GPAI7
{2, PIN_PULL_DIS, 3, "PA.7"},
#endif
#ifdef AIC_USING_CTP
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_RST_PIN},
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_INT_PIN},
#endif
};
void aic_board_pinmux_init(void)
@@ -374,4 +402,24 @@ void aic_board_pinmux_init(void)
hal_gpio_set_bias_pull(g, p, aic_pinmux_config[i].bias);
hal_gpio_set_drive_strength(g, p, aic_pinmux_config[i].drive);
}
#ifndef AIC_BOOTLOADER
struct fdt_header *header;
uint32_t dtb_size;
void *dtb_pos_r;
header = (struct fdt_header *)(&__dtb_pos_f);
if (fdt_magic(header) == FDT_MAGIC)
{
dtb_size = fdt_totalsize(header);
dtb_pos_r = aicos_malloc(0, dtb_size);
aicos_memcpy(dtb_pos_r, (void *)(&__dtb_pos_f), dtb_size);
of_relocate_dtb((unsigned long)dtb_pos_r);
pinmux_fdt_parse();
}
#endif
}

16
target/d13x/demo88-nor/sys_clk.c
View File

@@ -27,7 +27,18 @@ struct aic_sysclk aic_sysclk_config[] = {
{AIC_CLK_AHB0_FREQ, CLK_AHB0, CLK_AXI_AHB_SRC1}, /* 200000000 */
{AIC_CLK_APB0_FREQ, CLK_APB0, CLK_APB0_SRC1}, /* 100000000 */
// {24000000, CLK_APB1, 0},
{25000000, CLK_OUT2, 0},
#ifdef AIC_USING_CLK_OUT0
{AIC_CLK_OUT0_FREQ, CLK_OUT0, 0},
#endif /* AIC_USING_CLK_OUT0 */
#ifdef AIC_USING_CLK_OUT1
{AIC_CLK_OUT1_FREQ, CLK_OUT1, 0},
#endif /* AIC_USING_CLK_OUT1 */
#ifdef AIC_USING_CLK_OUT2
{AIC_CLK_OUT2_FREQ, CLK_OUT2, 0},
#endif /* AIC_USING_CLK_OUT2 */
#ifdef AIC_USING_CLK_OUT3
{AIC_CLK_OUT3_FREQ, CLK_OUT3, 0},
#endif /* AIC_USING_CLK_OUT3 */
};
/*
@@ -66,8 +77,5 @@ void aic_board_sysclk_init(void)
/* Enable sys clk */
hal_clk_enable_deassertrst_iter(CLK_GPIO);
hal_clk_enable_deassertrst_iter(CLK_GTC);
#ifdef AIC_USING_GMAC0
hal_clk_enable_iter(CLK_OUT2);
#endif
}

12
target/d13x/kunlunpi88-nor/board.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, ArtInChip Technology Co., Ltd
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -122,9 +122,6 @@ void aic_memheap_free(int type, void *rmem)
*/
void rt_hw_board_init(void)
{
aic_board_sysclk_init();
aic_board_pinmux_init();
#ifdef RT_USING_HEAP
rt_system_heap_init((void *)&__heap_start, (void *)&__heap_end);
#if (!defined(QEMU_RUN) && defined(RT_USING_MEMHEAP))
@@ -132,6 +129,9 @@ void rt_hw_board_init(void)
#endif
#endif
aic_board_sysclk_init();
aic_board_pinmux_init();
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
@@ -180,9 +180,11 @@ const struct dfs_mount_tbl mount_table[] = {
#ifdef LPKG_RAMDISK_TYPE_INITDATA
{"ramdisk0", "/ram", "elm", 0, 0, 0},
#endif
#ifndef AIC_AB_SYSTEM_INTERFACE
#if (defined(AIC_USING_FS_IMAGE_TYPE_FATFS_FOR_0) || defined(AIC_USING_FS_IMAGE_TYPE_FATFS_FOR_1))
{"blk_rodata", "/rodata", "elm", 0, 0, 0},
#endif
#endif
#ifdef LPKG_USING_LITTLEFS
{"data", "/data", "lfs", 0, 0, 0},
#endif
@@ -192,7 +194,7 @@ const struct dfs_mount_tbl mount_table[] = {
#ifdef AIC_USING_SDMC1
{"sd0", "/sdcard", "elm", 0, 0, 0},
#endif
#if (defined(AIC_USING_USB0_HOST) || defined(AIC_USING_USB1_HOST))
#if (defined(AIC_USING_USB0_HOST) || defined(AIC_USING_USB0_OTG) || defined(AIC_USING_USB1_HOST))
{"udisk", "/udisk", "elm", 0, 0, 0xFF},
#endif
{0}

BIN
target/d13x/kunlunpi88-nor/pack/bootloader.bin
View File

Binary file not shown.

13
target/d13x/kunlunpi88-nor/pack/env.txt Normal file
View File

@@ -0,0 +1,13 @@
osAB_next=A
osAB_now=A
rodataAB_next=A
rodataAB_now=A
dataAB_next=A
dataAB_now=A
upgrade_available=0
bootlimit=5
bootcount=0
rodata_partname=blk_rodata
rodata_partname_r=blk_rodata_r
data_partname=blk_data
data_partname_r=blk_data_r

61
target/d13x/kunlunpi88-nor/pack/image_cfg.json
View File

@@ -3,9 +3,11 @@
"size": "16m", // Size of SPI NOR
"partitions": {
"spl": { "size": "256k" },
"env": { "size": "128k" },
"env_r": { "size": "128k" },
"os": { "size": "2m" },
"rodata": { "size": "6m" },
"data": { "size": "7m" }
"rodata": { "size": "7m" },
"data": { "size": "1m" }
},
},
"image": {
@@ -19,10 +21,15 @@
}
},
"updater": { // Image writer which is downloaded to RAM by USB
"psram": {
"file": "usbupg-psram-init.aic",
"attr": ["required", "run"],
"ram": "0x30044000"
},
"spl": {
"file": "bootloader.aic",
"attr": ["required", "run"],
"ram": "0x30100000"
"ram": "0x40100000"
},
},
"target": { // Image components which will be burn to device's partitions
@@ -31,6 +38,11 @@
"attr": ["mtd", "required"],
"part": ["spl"]
},
"env": {
"file": "env.bin",
"attr": ["mtd", "optional"],
"part": ["env","env_r"]
},
"os": {
"file": "d13x_os.itb",
"attr": ["mtd", "required"],
@@ -48,25 +60,50 @@
},
},
},
"temporary": { // Pre-proccess to generate image components from raw data
"aicboot": {
"bootloader.aic": {
"pre-process": { // Pre-proccess to generate image components from raw data
"aicimage": { // Create aic boot image
"usbupg-psram-init.aic": { // No loader, only PreBootProgram to initialize PSRAM
"head_ver": "0x00010001",
"loader": {
"file": "bootloader.bin",
"load address": "0x30100000",
"entry point": "0x30100100",
},
"resource": {
"private": "pbp_cfg.bin",
"pbp": "d13x.pbp",
},
},
"pbp_ext.aic": {
"head_ver": "0x00010001",
"resource": {
"pbp": "d13x.pbp",
"private": "pbp_cfg.bin",
},
// combine to use with loader.aic
"with_ext": "true",
},
"loader.aic": {
"head_ver": "0x00010001",
"loader": {
"file": "bootloader.bin",
"load address": "0x40200000",
"entry point": "0x40200100", // 256 byte aic header
},
"resource": {
"private": "pbp_cfg.bin",
},
},
},
"itb": {
"concatenate": { // cat files in order
"bootloader.aic": ["pbp_ext.aic", "loader.aic"],
},
"itb": { // Create itb image from its
"d13x_os.itb": {
"its": "d13x_os.its"
},
},
"uboot_env": { // Create env data from txt
"env.bin": {
"file": "env.txt",
"size": "4096",
"redundant": "enable",
},
},
},
}

8
target/d13x/kunlunpi88-nor/pack/ota-subimgs.cfg Normal file
View File

@@ -0,0 +1,8 @@
[image]
size = "";
version = "1.0.0";
[file]
ota_info.bin:file;
d13x_os.itb:os;
rodata.fatfs:rodata;

4
target/d13x/kunlunpi88-nor/pack/pbp_cfg.json
View File

@@ -196,9 +196,9 @@
"main": {
"uart_id": "0", // UART0 for log output
"uart_tx_pin_cfg_reg": "0x18700080", // PA0
"uart_tx_pin_cfg_val": "0x035",
"uart_tx_pin_cfg_val": "0x335",
"uart_rx_pin_cfg_reg": "0x18700084", // PA1
"uart_rx_pin_cfg_val": "0x035",
"uart_rx_pin_cfg_val": "0x335",
// "uart_id": "0", // UART0 for log output
// "uart_tx_pin_cfg_reg": "0x18700E88", // PN2

48
target/d13x/kunlunpi88-nor/pinmux.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, ArtInChip Technology Co., Ltd
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -9,6 +9,11 @@
#include <aic_core.h>
#include <aic_hal.h>
#include "board.h"
#include <libfdt.h>
#include <of.h>
#include <aic_utils.h>
extern size_t __dtb_pos_f;
struct aic_pinmux
{
@@ -22,17 +27,17 @@ struct aic_pinmux aic_pinmux_config[] = {
#ifdef AIC_USING_UART0
/* uart0 */
{5, PIN_PULL_DIS, 3, "PA.0"},
{5, PIN_PULL_DIS, 3, "PA.1"},
{5, PIN_PULL_UP, 3, "PA.1"},
#endif
#ifdef AIC_USING_UART1
/* uart1 */
{5, PIN_PULL_DIS, 3, "PD.2"},
{5, PIN_PULL_DIS, 3, "PD.3"},
{5, PIN_PULL_UP, 3, "PD.3"},
#endif
#ifdef AIC_USING_UART2
/* uart2 */
{5, PIN_PULL_DIS, 3, "PD.4"}, // BT_UART2_TX
{5, PIN_PULL_DIS, 3, "PD.5"}, // BT_UART2_RX
{5, PIN_PULL_UP, 3, "PD.5"}, // BT_UART2_RX
#endif
#ifdef AIC_USING_CAN0
/* can0 */
@@ -59,7 +64,7 @@ struct aic_pinmux aic_pinmux_config[] = {
{4, PIN_PULL_DIS, 3, "PA.8"}, // SCK
{4, PIN_PULL_DIS, 3, "PA.9"}, // SDA
#endif
#ifdef AIC_USING_QSPI0
#if defined(AIC_USING_QSPI0) && !defined(AIC_SYSCFG_SIP_FLASH_ENABLE)
/* qspi0 */
{2, PIN_PULL_DIS, 3, "PB.0"},
{2, PIN_PULL_DIS, 3, "PB.1"},
@@ -117,9 +122,18 @@ struct aic_pinmux aic_pinmux_config[] = {
{2, PIN_PULL_DIS, 3, "PD.26"},
{2, PIN_PULL_DIS, 3, "PD.27"},
#endif
#ifdef AIC_USING_CLK_OUT0
{6, PIN_PULL_DIS, 3, "PD.13"},
#endif
#ifdef AIC_USING_CLK_OUT1
{2, PIN_PULL_DIS, 3, "PE.11"},
#endif
#ifdef AIC_USING_CLK_OUT2
{2, PIN_PULL_DIS, 3, "PE.10"},
#endif
#ifdef AIC_USING_CLK_OUT3
{7, PIN_PULL_DIS, 3, "PC.6"},
#endif
#ifdef AIC_USING_DVP
{3, PIN_PULL_DIS, 3, "PE.0"},
{3, PIN_PULL_DIS, 3, "PE.1"},
@@ -265,6 +279,10 @@ struct aic_pinmux aic_pinmux_config[] = {
#ifdef AIC_USING_GPAI7
{2, PIN_PULL_DIS, 3, "PA.7"},
#endif
#ifdef AIC_USING_CTP
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_RST_PIN},
{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_INT_PIN},
#endif
};
void aic_board_pinmux_init(void)
@@ -284,4 +302,24 @@ void aic_board_pinmux_init(void)
hal_gpio_set_bias_pull(g, p, aic_pinmux_config[i].bias);
hal_gpio_set_drive_strength(g, p, aic_pinmux_config[i].drive);
}
#ifndef AIC_BOOTLOADER
struct fdt_header *header;
uint32_t dtb_size;
void *dtb_pos_r;
header = (struct fdt_header *)(&__dtb_pos_f);
if (fdt_magic(header) == FDT_MAGIC)
{
dtb_size = fdt_totalsize(header);
dtb_pos_r = aicos_malloc(0, dtb_size);
aicos_memcpy(dtb_pos_r, (void *)(&__dtb_pos_f), dtb_size);
of_relocate_dtb((unsigned long)dtb_pos_r);
pinmux_fdt_parse();
}
#endif
}

16
target/d13x/kunlunpi88-nor/sys_clk.c
View File

@@ -27,7 +27,18 @@ struct aic_sysclk aic_sysclk_config[] = {
{AIC_CLK_AHB0_FREQ, CLK_AHB0, CLK_AXI_AHB_SRC1}, /* 200000000 */
{AIC_CLK_APB0_FREQ, CLK_APB0, CLK_APB0_SRC1}, /* 100000000 */
// {24000000, CLK_APB1, 0},
{25000000, CLK_OUT2, 0},
#ifdef AIC_USING_CLK_OUT0
{AIC_CLK_OUT0_FREQ, CLK_OUT0, 0},
#endif /* AIC_USING_CLK_OUT0 */
#ifdef AIC_USING_CLK_OUT1
{AIC_CLK_OUT1_FREQ, CLK_OUT1, 0},
#endif /* AIC_USING_CLK_OUT1 */
#ifdef AIC_USING_CLK_OUT2
{AIC_CLK_OUT2_FREQ, CLK_OUT2, 0},
#endif /* AIC_USING_CLK_OUT2 */
#ifdef AIC_USING_CLK_OUT3
{AIC_CLK_OUT3_FREQ, CLK_OUT3, 0},
#endif /* AIC_USING_CLK_OUT3 */
};
/*
@@ -66,8 +77,5 @@ void aic_board_sysclk_init(void)
/* Enable sys clk */
hal_clk_enable_deassertrst_iter(CLK_GPIO);
hal_clk_enable_deassertrst_iter(CLK_GTC);
#ifdef AIC_USING_GMAC0
hal_clk_enable_iter(CLK_OUT2);
#endif
}