V1.0.5

2025-12-13 09:58:54 +00:00 · 2024-07-09 15:46:51 +08:00
parent ac4afe16c9
commit cf270df8d6
3 changed files with 0 additions and 3 deletions
--- a/bsp/artinchip/sys/d12x/vectors.S
+++ b/bsp/artinchip/sys/d12x/vectors.S
@@ -154,7 +154,6 @@ Default_IRQHandler:
    .type   trap, %function
 trap:
    /* Check for interrupt */
-    j       .
    addi    sp, sp, -4
    sw      t0, 0x0(sp)
    csrr    t0, mcause
--- a/bsp/artinchip/sys/d13x/vectors.S
+++ b/bsp/artinchip/sys/d13x/vectors.S
@@ -154,7 +154,6 @@ Default_IRQHandler:
    .type   trap, %function
 trap:
    /* Check for interrupt */
-    j       .
    addi    sp, sp, -4
    sw      t0, 0x0(sp)
    csrr    t0, mcause
--- a/bsp/artinchip/sys/g73x/vectors.S
+++ b/bsp/artinchip/sys/g73x/vectors.S
@@ -154,7 +154,6 @@ Default_IRQHandler:
    .type   trap, %function
 trap:
    /* Check for interrupt */
-    j       .
    addi    sp, sp, -4
    sw      t0, 0x0(sp)
    csrr    t0, mcause