mirror of
https://gitee.com/Vancouver2017/luban-lite-t3e-pro.git
synced 2025-12-16 03:18:54 +00:00
V1.0.6
This commit is contained in:
@@ -252,8 +252,11 @@ config AIC_USING_CAP5
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default n
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select AIC_CAP_DRV
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source "bsp/artinchip/drv/cap/Kconfig"
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endmenu
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#---------------------------
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# CAN device global option
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#---------------------------
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@@ -287,6 +290,10 @@ source "bsp/artinchip/drv/cir/Kconfig"
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# usb device global option
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#---------------------------
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config AIC_USB_OTG_DRV
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bool
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default n
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config AIC_USING_USB0
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bool "Using Usb0"
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default n
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@@ -305,6 +312,7 @@ if AIC_USING_USB0
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bool "OTG"
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select AIC_USB_DEVICE_DRV
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select AIC_USB_HOST_EHCI_DRV
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select AIC_USB_OTG_DRV
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endchoice
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endif
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@@ -639,6 +647,21 @@ config AIC_USING_AUDIO
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source "bsp/artinchip/drv/audio/Kconfig"
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#---------------------------
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# TOUCH device global option
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#---------------------------
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if KERNEL_BAREMETAL
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config AIC_USING_TOUCH
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bool "Using Touch"
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default n
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select AIC_TOUCH_DRV
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source "bsp/artinchip/drv_bare/touch/Kconfig"
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endif
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#---------------------------
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# xxx device global option
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#---------------------------
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2022, ArtInChip Technology Co., Ltd
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* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@@ -164,9 +164,11 @@ const struct dfs_mount_tbl mount_table[] = {
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#ifdef LPKG_RAMDISK_TYPE_INITDATA
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{"ramdisk0", "/ram", "elm", 0, 0, 0},
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#endif
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#ifndef AIC_AB_SYSTEM_INTERFACE
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#if (defined(AIC_USING_FS_IMAGE_TYPE_FATFS_FOR_0) || defined(AIC_USING_FS_IMAGE_TYPE_FATFS_FOR_1))
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{"blk_rodata", "/rodata", "elm", 0, 0, 0},
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#endif
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#endif
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#ifdef LPKG_USING_LITTLEFS
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{"data", "/data", "lfs", 0, 0, 0},
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#endif
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@@ -176,7 +178,7 @@ const struct dfs_mount_tbl mount_table[] = {
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#ifdef AIC_USING_SDMC1
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{"sd0", "/sdcard", "elm", 0, 0, 0},
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#endif
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#if (defined(AIC_USING_USB0_HOST) || defined(AIC_USING_USB1_HOST))
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#if (defined(AIC_USING_USB0_HOST) || defined(AIC_USING_USB0_OTG) || defined(AIC_USING_USB1_HOST))
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{"udisk", "/udisk", "elm", 0, 0, 0xFF},
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#endif
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{0}
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Binary file not shown.
13
target/g73x/demo100-nor/pack/env.txt
Normal file
13
target/g73x/demo100-nor/pack/env.txt
Normal file
@@ -0,0 +1,13 @@
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osAB_next=A
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osAB_now=A
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rodataAB_next=A
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rodataAB_now=A
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dataAB_next=A
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dataAB_now=A
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upgrade_available=0
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bootlimit=5
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bootcount=0
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rodata_partname=blk_rodata
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rodata_partname_r=blk_rodata_r
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data_partname=blk_data
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data_partname_r=blk_data_r
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@@ -3,7 +3,11 @@
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"size": "2m", // Size of SPI NAND
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"partitions": {
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"spl": { "size": "256k" },
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"os": { "size": "1m" },
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"env": { "size": "128k" },
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"env_r": { "size": "128k" },
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"os": { "size": "512k" },
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"os_r": { "size": "512k" },
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},
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},
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"image": {
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@@ -29,6 +33,11 @@
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"attr": ["mtd", "required"],
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"part": ["spl"]
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},
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"env": {
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"file": "env.bin",
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"attr": ["mtd", "optional"],
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"part": ["env","env_r"]
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},
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"os": {
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"file": "g73x_os.itb",
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"attr": ["mtd", "required"],
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@@ -36,25 +45,43 @@
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},
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},
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},
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"temporary": { // Pre-proccess to generate image components from raw data
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"aicboot": {
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"bootloader.aic": {
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"pre-process": { // Pre-proccess to generate image components from raw data
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"aicimage": { // Create aic boot image
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"pbp_ext.aic": {
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"head_ver": "0x00010001",
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"resource": {
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"pbp": "g73x.pbp",
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"private": "pbp_cfg.bin",
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},
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// combine to use with loader.aic
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"with_ext": "true",
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},
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"loader.aic": {
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"head_ver": "0x00010001",
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"loader": {
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"file": "bootloader.bin",
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"load address": "0x30100000",
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"entry point": "0x30100100",
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"entry point": "0x30100100", // 256 byte aic header
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},
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"resource": {
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"private": "pbp_cfg.bin",
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"pbp": "g73x.pbp",
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},
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},
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},
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"itb": {
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"concatenate": { // cat files in order
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"bootloader.aic": ["pbp_ext.aic", "loader.aic"],
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},
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"itb": { // Create itb image from its
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"g73x_os.itb": {
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"its": "g73x_os.its"
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},
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},
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"uboot_env": { // Create env data from txt
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"env.bin": {
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"file": "env.txt",
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"size": "4096",
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"redundant": "enable",
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},
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},
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},
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}
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7
target/g73x/demo100-nor/pack/ota-subimgs.cfg
Normal file
7
target/g73x/demo100-nor/pack/ota-subimgs.cfg
Normal file
@@ -0,0 +1,7 @@
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[image]
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size = "";
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version = "1.0.0";
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[file]
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ota_info.bin:file;
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g73x_os.itb:os;
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2022, ArtInChip Technology Co., Ltd
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* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@@ -22,7 +22,7 @@ struct aic_pinmux aic_pinmux_config[] = {
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#ifdef AIC_USING_UART0
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/* uart0 */
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{5, PIN_PULL_DIS, 3, "PA.0"},
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{5, PIN_PULL_DIS, 3, "PA.1"},
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{5, PIN_PULL_UP, 3, "PA.1"},
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#ifdef AIC_DEV_UART0_MODE_RS485
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{1, PIN_PULL_DIS, 3, AIC_UART0_PA_RS485_CTL_NAME},
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#endif
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@@ -30,7 +30,7 @@ struct aic_pinmux aic_pinmux_config[] = {
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#ifdef AIC_USING_UART1
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/* uart1 */
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{5, PIN_PULL_DIS, 3, "PD.2"},
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{5, PIN_PULL_DIS, 3, "PD.3"},
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{5, PIN_PULL_UP, 3, "PD.3"},
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#ifdef AIC_DEV_UART1_MODE_RS485
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{1, PIN_PULL_DIS, 3, AIC_UART1_PA_RS485_CTL_NAME},
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#endif
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@@ -39,13 +39,13 @@ struct aic_pinmux aic_pinmux_config[] = {
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/* uart2 */
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#ifdef AIC_DEV_UART2_MODE_RS485
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{5, PIN_PULL_DIS, 3, "PD.4"}, // BT_UART2_TX
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{5, PIN_PULL_DIS, 3, "PD.5"}, // BT_UART2_RX
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{5, PIN_PULL_UP, 3, "PD.5"}, // BT_UART2_RX
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{1, PIN_PULL_DIS, 3, AIC_UART2_PA_RS485_CTL_NAME},
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#else
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{8, PIN_PULL_DIS, 3, "PA.2"}, // BT_UART2_CTS
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{8, PIN_PULL_DIS, 3, "PA.3"}, // BT_UART2_RTS
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{5, PIN_PULL_DIS, 3, "PD.4"}, // BT_UART2_TX
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{5, PIN_PULL_DIS, 3, "PD.5"}, // BT_UART2_RX
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{5, PIN_PULL_UP, 3, "PD.5"}, // BT_UART2_RX
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{1, PIN_PULL_DIS, 3, "PD.6"}, // BT_PWR_ON
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#endif
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#endif
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@@ -81,7 +81,7 @@ struct aic_pinmux aic_pinmux_config[] = {
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{4, PIN_PULL_DIS, 3, "PA.8"}, // SCK
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{4, PIN_PULL_DIS, 3, "PA.9"}, // SDA
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#endif
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#ifdef AIC_USING_QSPI0
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#if defined(AIC_USING_QSPI0) && !defined(AIC_SYSCFG_SIP_FLASH_ENABLE)
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/* qspi0 */
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{2, PIN_PULL_DIS, 3, "PB.0"},
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{2, PIN_PULL_DIS, 3, "PB.1"},
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@@ -197,9 +197,19 @@ struct aic_pinmux aic_pinmux_config[] = {
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{2, PIN_PULL_DIS, 3, "PE.9"},
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/* phy0 reset gpio */
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{1, PIN_PULL_DIS, 3, "PE.6"},
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/* clk_out2 */
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#endif
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#ifdef AIC_USING_CLK_OUT0
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{6, PIN_PULL_DIS, 3, "PD.13"},
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#endif
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#ifdef AIC_USING_CLK_OUT1
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{2, PIN_PULL_DIS, 3, "PE.11"},
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#endif
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#ifdef AIC_USING_CLK_OUT2
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{2, PIN_PULL_DIS, 3, "PE.10"},
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#endif
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#ifdef AIC_USING_CLK_OUT3
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{7, PIN_PULL_DIS, 3, "PC.6"},
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#endif
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#ifdef AIC_USING_PWM0
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{4, PIN_PULL_DIS, 3, "PE.0"},
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//{4, PIN_PULL_DIS, 3, "PE.1"},
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@@ -324,6 +334,10 @@ struct aic_pinmux aic_pinmux_config[] = {
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#ifdef AIC_USING_PSADC15
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{7, PIN_PULL_DIS, 3, "PA.15"},
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#endif
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#ifdef AIC_USING_CTP
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{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_RST_PIN},
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{1, PIN_PULL_DIS, 3, AIC_TOUCH_PANEL_INT_PIN},
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#endif
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};
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void aic_board_pinmux_init(void)
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@@ -27,7 +27,18 @@ struct aic_sysclk aic_sysclk_config[] = {
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{AIC_CLK_AHB0_FREQ, CLK_AHB0, CLK_AXI_AHB_SRC1}, /* 200000000 */
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{AIC_CLK_APB0_FREQ, CLK_APB0, CLK_APB0_SRC1}, /* 100000000 */
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// {24000000, CLK_APB1, 0},
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{25000000, CLK_OUT2, 0},
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#ifdef AIC_USING_CLK_OUT0
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{AIC_CLK_OUT0_FREQ, CLK_OUT0, 0},
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#endif /* AIC_USING_CLK_OUT0 */
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#ifdef AIC_USING_CLK_OUT1
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{AIC_CLK_OUT1_FREQ, CLK_OUT1, 0},
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#endif /* AIC_USING_CLK_OUT1 */
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#ifdef AIC_USING_CLK_OUT2
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{AIC_CLK_OUT2_FREQ, CLK_OUT2, 0},
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#endif /* AIC_USING_CLK_OUT2 */
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#ifdef AIC_USING_CLK_OUT3
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{AIC_CLK_OUT3_FREQ, CLK_OUT3, 0},
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#endif /* AIC_USING_CLK_OUT3 */
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};
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/*
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@@ -66,8 +77,5 @@ void aic_board_sysclk_init(void)
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/* Enable sys clk */
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hal_clk_enable_deassertrst_iter(CLK_GPIO);
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hal_clk_enable_deassertrst_iter(CLK_GTC);
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#ifdef AIC_USING_GMAC0
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hal_clk_enable_iter(CLK_OUT2);
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#endif
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}
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