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<div class=" wh_topic_content body "><main role="main"><article class="- topic/topic concept/concept topic concept" role="article" aria-labelledby="ariaid-title1"><span class="edit-link" style="font-size:12px; opacity:0.6; text-align:right; vertical-align:middle"><a target="_blank" href="http://172.16.35.88/tasks/jdssno1uvvbf2mltu9kb9v3if05d5gopuakboe8hlud18rma/edit/F:/aicdita/aicdita-cn/topics/sdk/sdmc/sdmc-data_structure_design.dita">Edit online</a></span><h1 class="- topic/title title topictitle1" id="ariaid-title1">数据结构设计</h1><div class="date inPage">15 Jul 2024</div><div style="color: gray;">
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Read time: 4 minute(s)
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</div><div class="- topic/body concept/conbody body conbody"><div class="- topic/p p" data-ofbid="d81533e22__20250121171525">SDMC 数据类型及其结构描述如下：<ul class="- topic/ul ul" id="sdmc_data_structure_design__ol_tcb_tst_c1c" data-ofbid="sdmc_data_structure_design__ol_tcb_tst_c1c"><li class="- topic/li li" data-ofbid="d81533e25__20250121171525"><strong class="+ topic/ph hi-d/b ph b">enum
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artinchip_mmc_state</strong>：定义了 SDMC 控制器的状态。<pre class="+ topic/pre pr-d/codeblock pre codeblock language-c" id="sdmc_data_structure_design__codeblock_s25_5st_c1c" data-ofbid="sdmc_data_structure_design__codeblock_s25_5st_c1c"><strong class="hl-keyword">enum</strong> artinchip_mmc_state {
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STATE_IDLE = <span class="hl-number">0</span>,
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STATE_SENDING_CMD,
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STATE_SENDING_DATA,
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STATE_DATA_BUSY,
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STATE_SENDING_STOP,
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STATE_DATA_ERROR,
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STATE_SENDING_CMD11,
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STATE_WAITING_CMD11_DONE,
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};</pre></li><li class="- topic/li li" data-ofbid="d81533e31__20250121171525"><strong class="+ topic/ph hi-d/b ph b">artinchip_mmc</strong>：记录了 SDMC 控制器的设备信息。<pre class="+ topic/pre pr-d/codeblock pre codeblock language-c" id="sdmc_data_structure_design__codeblock_yjs_vst_c1c" data-ofbid="sdmc_data_structure_design__codeblock_yjs_vst_c1c"><strong class="hl-keyword">struct</strong> artinchip_mmc {
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spinlock_t lock;
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spinlock_t irq_lock;
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<strong class="hl-keyword">void</strong> __iomem *regs;
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<strong class="hl-keyword">void</strong> __iomem *fifo_reg;
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bool wm_aligned;
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<strong class="hl-keyword">struct</strong> scatterlist *sg;
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<strong class="hl-keyword">struct</strong> sg_mapping_iter sg_miter;
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<strong class="hl-keyword">struct</strong> mmc_request *mrq;
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<strong class="hl-keyword">struct</strong> mmc_command *cmd;
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<strong class="hl-keyword">struct</strong> mmc_data *data;
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<strong class="hl-keyword">struct</strong> mmc_command stop_abort;
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<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">int</strong> prev_blksz;
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<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">char</strong> timing;
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<em class="hl-comment">/* DMA interface members*/</em>
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bool use_dma;
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bool using_dma;
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dma_addr_t sg_dma;
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<strong class="hl-keyword">void</strong> *sg_cpu;
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<strong class="hl-keyword">const</strong> <strong class="hl-keyword">struct</strong> artinchip_mmc_dma_ops *dma_ops;
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<em class="hl-comment">/* For idmac */</em>
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<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">int</strong> ring_size;
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<em class="hl-comment">/* Registers's physical base address */</em>
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resource_size_t phy_regs;
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u32 cmd_status;
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u32 data_status;
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u32 stop_cmdr;
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u32 dir_status;
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<strong class="hl-keyword">struct</strong> tasklet_struct tasklet;
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<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong> pending_events;
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<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong> completed_events;
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<strong class="hl-keyword">enum</strong> artinchip_mmc_state state;
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<strong class="hl-keyword">struct</strong> list_head queue;
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u32 bus_hz;
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u32 current_speed;
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u32 fifoth_val;
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u16 verid;
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<strong class="hl-keyword">struct</strong> device *dev;
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<strong class="hl-keyword">struct</strong> artinchip_mmc_board *pdata;
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<strong class="hl-keyword">const</strong> <strong class="hl-keyword">struct</strong> artinchip_mmc_drv_data *drv_data;
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<strong class="hl-keyword">void</strong> *priv;
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<strong class="hl-keyword">struct</strong> clk *biu_clk;
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<strong class="hl-keyword">struct</strong> clk *ciu_clk;
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<strong class="hl-keyword">struct</strong> artinchip_mmc_slot *slot;
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<em class="hl-comment">/* FIFO push and pull */</em>
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<strong class="hl-keyword">int</strong> fifo_depth;
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<strong class="hl-keyword">int</strong> data_shift;
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u8 part_buf_start;
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u8 part_buf_count;
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<strong class="hl-keyword">enum</strong> data_width data_width;
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<strong class="hl-keyword">union</strong> {
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u16 part_buf16;
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u32 part_buf32;
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u64 part_buf;
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};
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bool vqmmc_enabled;
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<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong> irq_flags; <em class="hl-comment">/* IRQ flags */</em>
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<strong class="hl-keyword">int</strong> irq;
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<strong class="hl-keyword">struct</strong> timer_list cmd11_timer;
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<strong class="hl-keyword">struct</strong> timer_list cto_timer;
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<strong class="hl-keyword">struct</strong> timer_list dto_timer;
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};</pre></li><li class="- topic/li li" data-ofbid="d81533e37__20250121171525"><strong class="+ topic/ph hi-d/b ph b">artinchip_mmc_board</strong>：记录了 Board 相关的配置信息。<pre class="+ topic/pre pr-d/codeblock pre codeblock language-c" id="sdmc_data_structure_design__codeblock_hn2_1tt_c1c" data-ofbid="sdmc_data_structure_design__codeblock_hn2_1tt_c1c"><strong class="hl-keyword">struct</strong> artinchip_mmc_board {
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<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">int</strong> bus_hz; <em class="hl-comment">/* Clock speed at the cclk_in pad */</em>
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u32 caps; <em class="hl-comment">/* Capabilities */</em>
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u32 caps2; <em class="hl-comment">/* More capabilities */</em>
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u32 pm_caps; <em class="hl-comment">/* PM capabilities */</em>
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<em class="hl-comment">/*
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* Override fifo depth. If 0, autodetect it from the FIFOTH register,
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* but note that this may not be reliable after a bootloader has used
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* it.
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*/</em>
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<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">int</strong> fifo_depth;
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<em class="hl-comment">/* delay in mS before detecting cards after interrupt */</em>
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u32 detect_delay_ms;
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<strong class="hl-keyword">struct</strong> reset_control *rstc;
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<strong class="hl-keyword">struct</strong> artinchip_mmc_dma_ops *dma_ops;
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<strong class="hl-keyword">struct</strong> dma_pdata *data;
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};</pre></li><li class="- topic/li li" data-ofbid="d81533e43__20250121171525"><strong class="+ topic/ph hi-d/b ph b">artinchip_mmc_slot</strong>：记录了 slot 相关的配置信息。<pre class="+ topic/pre pr-d/codeblock pre codeblock language-c" id="sdmc_data_structure_design__codeblock_ayj_1tt_c1c" data-ofbid="sdmc_data_structure_design__codeblock_ayj_1tt_c1c"><strong class="hl-keyword">struct</strong> artinchip_mmc_slot {
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<strong class="hl-keyword">struct</strong> mmc_host *mmc;
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<strong class="hl-keyword">struct</strong> artinchip_mmc *host;
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u32 ctype;
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<strong class="hl-keyword">struct</strong> mmc_request *mrq;
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<strong class="hl-keyword">struct</strong> list_head queue_node;
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<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">int</strong> clock;
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<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">int</strong> __clk_old;
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<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong> flags;
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#<span class="hl-directive">define</span> ARTINCHIP_MMC_CARD_PRESENT <span class="hl-number">0</span>
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#<span class="hl-directive">define</span> ARTINCHIP_MMC_CARD_NEED_INIT <span class="hl-number">1</span>
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#<span class="hl-directive">define</span> ARTINCHIP_MMC_CARD_NO_LOW_PWR <span class="hl-number">2</span>
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#<span class="hl-directive">define</span> ARTINCHIP_MMC_CARD_NO_USE_HOLD <span class="hl-number">3</span>
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#<span class="hl-directive">define</span> ARTINCHIP_MMC_CARD_NEEDS_POLL <span class="hl-number">4</span>
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};</pre></li><li class="- topic/li li" data-ofbid="d81533e49__20250121171525"><strong class="+ topic/ph hi-d/b ph b">artinchip_mmc_drv_data</strong>：记录了 AIC SDMC
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驱动的特有数据。<pre class="+ topic/pre pr-d/codeblock pre codeblock language-c" id="sdmc_data_structure_design__codeblock_hbp_1tt_c1c" data-ofbid="sdmc_data_structure_design__codeblock_hbp_1tt_c1c"><strong class="hl-keyword">struct</strong> artinchip_mmc_drv_data {
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<strong class="hl-keyword">unsigned</strong> <strong class="hl-keyword">long</strong> *caps;
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u32 num_caps;
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<strong class="hl-keyword">int</strong> (*init)(<strong class="hl-keyword">struct</strong> artinchip_mmc *host);
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<strong class="hl-keyword">int</strong> (*parse_dt)(<strong class="hl-keyword">struct</strong> artinchip_mmc *host);
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<strong class="hl-keyword">int</strong> (*execute_tuning)(<strong class="hl-keyword">struct</strong> artinchip_mmc_slot *slot, u32 opcode);
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<strong class="hl-keyword">int</strong> (*switch_voltage)(<strong class="hl-keyword">struct</strong> mmc_host *mmc,
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<strong class="hl-keyword">struct</strong> mmc_ios *ios);
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};</pre></li></ul></div></div></article></main></div>
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