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v1.1.2:add audio and efuse patch

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This commit is contained in:
刘可亮
2025-03-14 16:31:58 +08:00
parent fe0b990053
commit 049676e8a8
27 changed files with 380 additions and 119 deletions
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32
bsp/artinchip/hal/efuse/hal_efuse.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
* Copyright (c) 2022-2025, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -43,7 +43,19 @@
#define EFUSE_STS_WRITING 3
#define EFUSE_STS_READING 4
static u32 opcode = 0;
int hal_efuse_init(void)
{
return 0;
}
int hal_efuse_deinit(void)
{
return 0;
}
int hal_efuse_clk_enable(void)
{
int ret = 0, val = EFUSE_TIMING_VALUE;
@@ -64,7 +76,7 @@ int hal_efuse_init(void)
return 0;
}
int hal_efuse_deinit(void)
int hal_efuse_clk_disable(void)
{
hal_clk_disable_assertrst(CLK_SID);
hal_clk_disable(CLK_SID);
@@ -72,6 +84,16 @@ int hal_efuse_deinit(void)
return 0;
}
void hal_efuse_write_enable(void)
{
opcode = EFUSE_OP_CODE;
}
void hal_efuse_write_disable(void)
{
opcode = 0;
}
int hal_efuse_get_version(void)
{
return readl(EFUSE_REG_VER);
@@ -126,6 +148,7 @@ int hal_efuse_read(u32 wid, u32 *wval)
return 0;
}
#ifdef EFUSE_WRITE_SUPPORT
int hal_efuse_write(u32 wid, u32 wval)
{
u32 addr, val, i;
@@ -134,7 +157,7 @@ int hal_efuse_write(u32 wid, u32 wval)
hal_log_err("Error, word id is too large.\n");
return -EINVAL;
}
for (i = 0; i < 2; i++) {
addr = (wid + EFUSE_MAX_WORD * i) << 2;
writel(addr, EFUSE_REG_ADDR);
@@ -146,7 +169,7 @@ int hal_efuse_write(u32 wid, u32 wval)
*/
val = readl(EFUSE_REG_CTL);
val &= ~((0xFFF << 16) | (1 << 0));
val |= ((EFUSE_OP_CODE << 16) | (1 << 0));
val |= ((opcode << 16) | (1 << 0));
writel(val, EFUSE_REG_CTL);
/* Wait write finish */
@@ -157,6 +180,7 @@ int hal_efuse_write(u32 wid, u32 wval)
return 0;
}
#endif
int hal_write_auth_key(u32 *key, u32 kwlen)
{

40
bsp/artinchip/hal/mac/aicmac_macaddr.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
* Copyright (c) 2022-2025, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,7 +9,12 @@
#include "aic_log.h"
#include <string.h>
#define AICMAC_CHIPID_LENGTH 6
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include "md5.h"
#define AICMAC_CHIPID_LENGTH 8
static int aicmac_efuse_read(u32 addr, void *data, u32 size)
@@ -18,6 +23,10 @@ static int aicmac_efuse_read(u32 addr, void *data, u32 size)
u8 *pd, *pw;
int ret;
if (hal_efuse_clk_enable()) {
return -1;
}
if (hal_efuse_wait_ready()) {
pr_err("eFuse is not ready.\n");
return -1;
@@ -46,6 +55,8 @@ static int aicmac_efuse_read(u32 addr, void *data, u32 size)
rest -= cnt;
}
hal_efuse_clk_disable();
return (int)(size - rest);
}
@@ -56,22 +67,29 @@ static inline int aicmac_get_chipid(unsigned char out_chipid[AICMAC_CHIPID_LENGT
void aicmac_get_macaddr_from_chipid(int port, unsigned char out_addr[6])
{
unsigned char chipid[AICMAC_CHIPID_LENGTH];
unsigned char key[AICMAC_CHIPID_LENGTH] = {'a', 'i', 'c', 'k', 'e', 'y'};
unsigned char hex_chipid[AICMAC_CHIPID_LENGTH] = { 0 };
char char_chipid[AICMAC_CHIPID_LENGTH * 2 + 1] = { 0 };
uint8_t md5_ahash[16] = { 0 };
int i;
if (!aicmac_get_chipid(chipid))
if (!aicmac_get_chipid(hex_chipid))
return;
for (i = 0; i < AICMAC_CHIPID_LENGTH; i++) {
out_addr[AICMAC_CHIPID_LENGTH - 1 - i] = chipid[i] ^ key[i];
for (i = 0; i < AICMAC_CHIPID_LENGTH ; i++) {
sprintf(&char_chipid[i * 2], "%02X", hex_chipid[i]);
}
if (port)
out_addr[1] ^= 0x55;
char_chipid[15] = 'a';
else
out_addr[1] ^= 0xAA;
char_chipid[15] = 'A';
out_addr[0] &= 0xFE;
out_addr[0] |= 0x02;
MD5Buffer(char_chipid, 16, md5_ahash);
/* Choose md5 result's [0][2][4][6][8][10] byte as mac address */
for (i = 0; i < 6; i++)
out_addr[i] = md5_ahash[2 * i];
out_addr[0] &= 0xfe; /* clear multicast bit */
out_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
}

4
bsp/artinchip/hal/syscfg/syscfg_hw_v1.1.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2024, ArtInChip Technology Co., Ltd
* Copyright (c) 2024-2025, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -248,7 +248,9 @@ static inline void syscfg_hw_sip_flash_init(void)
#if defined(AIC_USING_SID)
u32 map;
/* 1. Read eFuse to set SiP flash IO mapping */
hal_efuse_clk_enable();
hal_efuse_read(IOMAP_EFUSE_WID, &val);
hal_efuse_clk_disable();
map = (val >> EFUSE_DATA_IOMAP_POS) & 0xFF;
/* 2. Set the SiP flash's access Controller */

4
bsp/artinchip/hal/syscfg/syscfg_hw_v1.2.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2024, ArtInChip Technology Co., Ltd
* Copyright (c) 2024-2025, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -175,7 +175,9 @@ static inline void syscfg_hw_sip_flash_init(void)
#if defined(AIC_USING_SID)
u32 map;
/* 1. Read eFuse to set SiP flash IO mapping */
hal_efuse_clk_enable();
hal_efuse_read(IOMAP_EFUSE_WID, &val);
hal_efuse_clk_disable();
map = (val >> EFUSE_DATA_IOMAP_POS) & 0xFF;
/* 2. Set the SiP flash's access Controller */

8
bsp/artinchip/hal/tsen/hal_tsen.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
* Copyright (c) 2022-2025, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -233,6 +233,10 @@ int hal_tsen_efuse_read(u32 addr, u32 *data, u32 size)
int ret;
int length = TSEN_EFUSE_STANDARD_LENGTH;
if (hal_efuse_clk_enable()) {
return -1;
}
rest = size;
while (rest > 0) {
wid = addr >> 2;
@@ -252,6 +256,8 @@ int hal_tsen_efuse_read(u32 addr, u32 *data, u32 size)
rest -= cnt;
}
hal_efuse_clk_disable();
return (int)(size - rest);
}
#endif